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{{{
function BG_Amplitude(AHandle : Integer; AAmplitude : Double) : Double;
}}}
BG_Amplitude controls the peak to peak voltage of the output waveform.
The return value is the actual voltage amplitude set. Note that this value may change however, depending on any subsequent calls to [[BG_Offset]].
To calculate the final waveform range, use the equation:
{{{
BG_Offset ± BG_Amplitude/2
}}}
Ensure that this voltage range lies inside the voltage range of the device. In BS120U, this is ±5V. If outside the voltage range of the device the BitGenLib library will adjust the offset and amplitude values.
BG_Amplitude is a 'live' function, meaning it will update the output waveform as soon as it is called. In this respect, BG_Amplitude differs from the other [[Setup]] parameters, which require a call to [[BG_Gen]] to update the waveform. For example, once a waveform is being generated, one can call BG_Amplitude to change the peak to peak voltage of the waveform live. It is not necessary to call [[BG_Gen]] again to restart the waveform because the [[BG_Amplitude]] function operates the BitScope output voltages, not BitGen itself.
See also [[BG_Offset]] and [[Voltage Setup]].
{{{
function BG_BurstMark(AHandle : Integer; ATime : Double) : Double;
}}}
BG_BurstMark controls the pre-burst delay time in waveform burst modes. The value ATime is given in seconds.
The return value will be the actual BG_BurstMark value set in seconds.
Note that BG_BurstMark is only valid in burst modes, [[DDS Mode]] and [[PinkNoise Mode]].
BG_BurstMark controls the BG_BurstMark phase of the [[Timing Cycle]]. The BG_BurstMark phase precedes the [[BG_Duration]] and [[BG_BurstSpace]] phases.
If [[BG_SyncMode]] is set to 4, SyncOut, then the TimePort will be asserted high during the BG_BurstMark phase. This implies that a falling edge on the TimePort will coincide with the start of the waveform burst. If BG_BurstMark is set to zero, then a small spike will appear on the TimePort before the waveform commences.
{{{
function BG_BurstSpace(AHandle : Integer; ATime : Double) : Double;
}}}
BG_BurstSpace sets the time in seconds to wait after each waveform burst. The return value is the actual value set in seconds.
The BG_BurstSpace delay period occurs after the [[BG_Duration]] phase of the [[Timing Cycle]].
Note that the BG_BurstSpace parameter is only used in burst modes, which can be used in the modes [[DDS|DDS Mode]] and [[Pink Noise|PinkNoise Mode]].
The output voltage during this period will begin at the last sample played, and then ramp down to the [[BG_BurstMark]] voltage. The [[BG_BurstMark]] voltage is defined to be the voltage of the first sample to be played in the BG_Duration phase. That is, the first sample in the wavetable.
The initial value of the BG_BurstSpace voltage ramp will be set to the last sample played during the BG_Duration phase. The gradient of this ramp is defined to be
{{{
full voltage range / BG_BurstSpace time.
}}}
This means that the ramp will be guaranteed to reach the [[BG_BurstMark]] voltage before the BG_BurstSpace phase has completed.
{{{
function BG_Close(AHandle : Integer) : Boolean;
}}}
BG_Close will close the BitGen link at AHandle. Note that BG_Close closes a link, it is not necessary to call [[BG_Init]] again. [[BG_Init]] should only ever be called once in the life of the application.
The return value is true if the link is valid and was closed correctly.
To reopen a link, use [[BG_Open]].
{{{
function BG_Count : Integer;
}}}
BG_Count returns the number of BitGen modules that were successfully opened. This function can be called after [[BG_Open]] to check the success of the open calls.
The handles of the BitGens returned will be assigned from 0 to BG_Count-1.
{{{
function BG_Delay(AHandle : Integer; ATime : Double) : Double;
}}}
BG_Delay controls the post-trigger delay. ATime is the time in seconds the BitGen will wait before the waveform will begin generating. Note that in the [[DDS Mode]], when using a burst mode, the delay will occur before the [[BG_BurstMark]] period on each burst.
{{{
function BG_Duration(AHandle : Integer; ATime : Double) : Double;
}}}
BG_Duration controls the length of the burst waveform in BG_Modes [[DDS Mode]] and [[PinkNoise Mode]]. BG_Duration is irrelevant to the other modes.
The value ATime is given in seconds. A value of 0 will result in an infinite continuous waveform.
The return value is the actual value set inside the BitGen virtual machine.
BG_Duration controls the BG_Duration phase of the [[Timing Cycle]].
{{{
function BG_Factor(AHandle : Integer; AFactor : Integer) : Integer;
}}}
BG_Factor controls the decimation factor or over-sample factor for the [[BG_SyncMode]] ClockOut. The argument AFactor controls the decimation factor. The return value returns the true value set.
When using [[BG_SyncMode]](3) ClockOut, a clock signal will be present on the clock pin. The TimePort will flip every sample rate tic. For example, this means that at a [[BG_SampleRate]] of 1MHz, the TimePort will output a clock signal with frequency 500kHz. BG_Factor controls the number of sample rate tics to wait until the bit is flipped. If we have a [[BG_SampleRate]] of 1MHz and a BG_Factor of 5, then the TimePort will output a 100kHz clock signal.
The minimum value for BG_Factor is 1. The maximum value is 65535.
{{{
function BG_Freq(AHandle : Integer; AFreq : Double) : Double;
}}}
BG_Freq controls the output frequency of the waveform in [[BG_Mode]](1), [[DDS Mode]].
The value AFreq is given in Hz.
The return value is the actual frequency set.
Note that in [[DDS Mode]] it is not necessary to call [[BG_SampleRate]]. The fastest possible sample rate will be chosen automatically. If BG_SampleRate is called in this mode the sample rate chosen will use the requested value as an upper bound (i.e. it may be lower but it won't be higher).
Note that this function does nothing in all other [[BG_Modes|BG_Mode]], including [[VSR Mode]]. To calculate the frequency in VSR Mode, use the formula
{{{
freq = sample rate / wavetable size
}}}
Note however, in VSR mode one can check the calculated frequency by calling BG_Freq with an AFreq argument of 0.
{{{
function BG_Gen(AHandle : Integer) : Boolean;
}}}
BG_Gen will start the waveform [[Timing Cycle]].
BG_Gen should be the last function called after the [[Setup]] process is complete.
BG_Gen will first update all the [[BitGen]] registers, then start the [[Timing Cycle]]. This implies that the Setup functions do not alter the state of the BitGen until BG_Gen is called. For example, if a waveform is being generated, and [[BG_Freq]] is called to update the frequency, this will not affect the output waveform until BG_Gen is called again.
The exceptions to this rule are the [[Voltage Setup]] parameters. [[BG_Amplitude]] and [[BG_Offset]] will update the waveform as soon as they are called. This is because these functions operate the BitScope device output voltages, not the BitGen.
Note that BG_Gen will return immediately, and leave the BitGen in the [[Timing Cycle]]. This implies that [[BitLib]] can be used independently to capture waveforms at the same time. It is possible to output BitGen waveform on ChB and capture the waveform from ChB into the BitScope buffer. It is also possible to output waveform from BitGen on ChB, connect the output to a circuit, and capture the response on ChA.
{{{
procedure BG_Halt(AHandle : Integer);
}}}
BG_Halt is used to stop the waveform generator once it has started.
The waveform generator is started with the function [[BG_Gen]]. If the waveform generated is a continuous waveform or an infinite burst, then BG_Halt can be used to stop the waveform. Note that if BG_Halt is used, then the End phase of the [[Timing Cycle]] is not executed.
{{{
function BG_High(AHandle : Integer; AHigh : Double) : Double;
}}}
BG_High controls the logic high level. The argument AHigh is the logic high level voltage in volts. The return value is the true value set inside the virtual machine. Note that the voltage must be between -5V and 5V.
This function is used in the BG_Mode [[Logic Mode]].
{{{
function BG_HoldOff(AHandle : Integer; ATime : Double) : Double;
}}}
BG_HoldOff is the pre-trigger delay. ATime is the time in seconds to wait before the BitGen module starts looking for a trigger. This hold-off time occurs only once per BG_Gen call. Note that this is only valid in modes with a trigger i.e. TriggerIn, GateIn, SyncOut.
{{{
procedure BG_Init;
}}}
BG_Init initializes the classes inside the library. This must be the first function called.
This function should be called only once in the application. Calling this function more than once will result in memory leaks.
BG_Init can be called before or after initializing the [[BitLib]] library with <<tiddler ExternalURL with: bitlib BL_Initialize BL_Initialize>>.
{{{
function BG_LoadTable(AHandle : Integer;AData : PSingle;ASize : Integer) : Boolean;
}}}
BG_LoadTable allows a user to load a wavetable for use in wavetable replay modes, [[DDS Mode]] and [[VSR Mode]]. In modes such as [[PinkNoise|PinkNoise Mode]], [[WhiteNoise|WhiteNoise Mode]], Clock, Logic and Reference, the wavetable is irrelevant. See [[Modes]] for more information on modes.
The pointer AData should point to an array of ASize floats (4-byte floating point precision number). The float values must be in the range -1..1. Each wavetable value corresponds to a value in the range
{{{
BG_Offset-BG_Amplitude/2 ... BG_Offset+BG_Amplitude/2
}}}
This range can be adjusted with the functions [[BG_Offset]] and [[BG_Amplitude]].
Note that in [[BG_Mode]](1) [[DDS Mode]], the size of the wavetable is fixed at 1024. If a size other than 1024 is given to BG_LoadTable, the return value will be false.
In [[BG_Mode]](0) [[VSR Mode]], the wavetable can be any value between 2..1024. In this mode, the frequency of the output waveform must be calculated from the equation
{{{
freq = sample rate / wavetable size
}}}
See [[Modes]] and [[Loading A WaveTable]] for further details.
{{{
function BG_Log : PChar;
}}}
BG_Log will return the next line in the debug log. Ideally, this function should be called when the application is otherwise idle. If no new debug message is present, then a null pointer will be returned.
The debug messages are written to a circular buffer. If log functionality is not required then there is no need to call BG_Log. Old log messages are simply overwritten and do not affect the operation of the application.
Log messages are written in the following form:
Severity : Message
The "Severity" string will be one of 'DEBUG','INFO','WARNING','ERROR', in increasing order of importance. "Message" will be a string descriptor of the message. If necessary, use a regular expression to parse the message and remove the severity string.
{{{
function BG_Low(AHandle : Integer; ALow : Double) : Double;
}}}
BG_Low controls the logic low level. The argument ALow is the logic low level voltage in volts. The return value is the true value set inside the virtual machine. Note that the voltage must be between -5V and 5V.
This function is used in the BG_Mode [[Logic Mode]].
{{{
function BG_Mark(AHandle : Integer; ATics : Integer) : Integer;
}}}
BG_Mark controls the number of master clock rate tics that the clock will be set high. This function is only used in [[BG_Mode]](4) [[Clock Mode]]. The return value is the true tic value set.
The BitGen master clock rate in BS120U is 30MHz. This implies that one tic is 1/30MHz = 33.33'nS. This means that each BG_Mark tic will be 33.33'nS in duration. For example, to clock signal low for 1uS one would call BG_Mark with an argument of 30.
Note that there are restrictions on the minimum and maximum BG_Mark tic value. The minimum value of BG_Mark is 5, and the maximum is 65535.
The high clock period may be set using other [[Clock Setup]] parameter, [[BG_Space]].
For more information on the Clock Mode can be found [[here|Clock Mode]].
{{{
function BG_Mode(AHandle : Integer; AMode : Integer) : Boolean;
}}}
BG_Mode selects the main BitGen mode. This parameter must be the first call made after the [[Initialization]] and [[ID Functions]]. This parameter must be called before all other [[Setup]] functions. BG_Mode will affect the behavior of all other [[Setup]] functions.
The function will return true if a valid mode has been selected, otherwise an alternate (default) mode will be selected.
The available modes are:
0. [[VSR Mode]] - Variable Sample Rate Mode
1. [[DDS Mode]] - Direct Digital Synthesis Mode
2. [[PinkNoise Mode]] - Pink Noise Pseudo Random Number Generator
3. [[WhiteNoise Mode]] - White Noise Pseudo Random Number Generator
4. [[Clock Mode]] - replay the internal sample rate clock
5. [[Logic Mode]] - logic level shifter
6. [[Reference Mode]] - voltage references
See [[Modes]] for a detailed description of each mode.
{{{
procedure BG_Name(AHandle : Integer; AStr : PChar);
}}}
BG_Name will return the [[BitLib]] link name of the BitGen attached at index "AHandle". The result will be placed in the string variable "AStr". An example name would be "USB:COM7".
This function can be used to identify the BitGens attached at the addresses returned by [[BG_Count]] after a [[BG_Open]] call.
{{{
function BG_Offset(AHandle : Integer; AOffset : Double) : Double;
}}}
BG_Offset controls the DC offset of the output waveform.
The return value is the actual DC offset voltage set. Note that the final value may change however, depending on any subsequent calls to [[BG_Amplitude]].
The final output voltage range is given by
{{{
BG_Offset ± BG_Amplitude/2
}}}
One must ensure that this voltage range lies inside the voltage range of the BitScope device. In BS120U, this range is ±5V. If outside this range the BitGenLib library will adjust the offset and amplitude values to fit.
BG_Offset is a 'live' function, meaning it will update the output waveform as soon as it is called. In this respect, BG_Offset differs from the other [[Setup]] parameters, which require a call to [[BG_Gen]] to update the waveform. For example, once a waveform is being generated, one can call BG_Offset to change the DC offset of the waveform live. It is not necessary to call [[BG_Gen]] again to restart the waveform because the [[BG_Offset]] function operates the BitScope output voltage controls, not BitGen.
See also [[BG_Amplitude]] and [[Voltage Setup]].
{{{
function BG_Open : Boolean;
}}}
BG_Open opens the BitGen links that are connected to the system.
Note that one must first connect to the BitScopes with [[BitLib]] using <<tiddler ExternalURL with: bitlib BL_Open BL_Open>> or <<tiddler ExternalURL with: bitlib BL_OpenLink BL_OpenLink>>.
[[BG_Open]] will search through the [[BitLib]] links to find a BS120U or BS100U with a [[BitGen]] installed.
[[BG_Open]] will return true if at least one BitGen was found. One can find the number of selected BitScopes opened with [[BG_Count]].
Close the links with [[BG_Close]].
!!Example
This example searches all the BitScopes listed in the [[Probe File]] and opens all the BitGen modules.
{{{
//===============
// First initialize the BITLIB library
//===============
BL_Initialize(); // Initialize the library...
success=BL_Open("bitscope.prb",true); // Open all links in the probe file
if (success) {
printf("Some BitScopes found.\n");
} else {
exit;
}
//===============
// Initialize the BITGEN library
//===============
BG_Init(); // Initialize the BitGen library...
success=BG_Open(); // Open all the BitGens...
if (success) {
printf("Some BitGens found.\n");
} else {
exit;
}
//===============
// Print stats....
//===============
for(i=0;i<BG_Count();i++){
BG_Name(i,str);
printf("BitGen %i has name %s \n",i,str);
printf("BitGen %i is in BitLib scope %i",i,BG_Scope(i));
}
//==============
// Do stuff...
//===============
}}}
{{{
function BG_Repeat(AHandle : Integer; ACount : Integer) : Integer;
}}}
BG_Repeat is used to count the number of burst cycles. This is parameter is only valid in BG_Modes that allow burst waveforms, [[DDS Mode]] and [[PinkNoise Mode]].
Each BG_Repeat loops through the [[BG_BurstMark]], [[BG_Duration]] and [[BG_BurstSpace]] phases of the [[Timing Cycle]].
An ACount value of 0 will cause the burst to repeat forever. In this case, the End phase of the [[Timing Cycle]] is never executed, and a [[BG_Halt]] call is required for the loop to terminate.
{{{
function BG_SampleRate(AHandle : Integer; ARate : Double) : Double;
}}}
The BG_SampleRate parameter sets the sample rate clock of the [[BitGen]]. This parameter is independent of the [[BitLib]] sample rate <<tiddler ExternalURL with: bitlib BL_SampleRate BL_SampleRate>>. The argument ARate is in Hz. The return value is the true sample rate value in Hz.
When using [[Direct Digital Synthesis|DDS Mode]], it is not necessary to select a sample rate. The fastest possible sample rate will be selected automatically.
The sample rate is valid for all [[BG_Modes|BG_Mode]], but the actual sample rate range differs for each BG_Mode and BG_SyncMode.
For the maximum allowable sample rates for each mode, see [[Maximum Sample Rates]].
For more information on calculating sample rates, see [[Calculating Sample Rates]].
{{{
function BG_Scope(AHandle : Integer) : Integer;
}}}
BG_Scope returns the [[BitLib]] handle corresponding to a BitGen handle.
!!Example
If one has 3 BitScopes; a BS445N, a BS100U, and a BS100U with BitGen installed which are connected in that order using the BitLib's <<tiddler ExternalURL with: bitlib BL_Open BL_Open>> function the BitScopes will have the following [[BitLib]] handles:
0 = BS445N
1 = BS100U
2 = BS100U with BitGen
When using [[BG_Open]], only one BitGen will be found, the BS100U with BitGen. This means that [[BG_Count]] will return 1, and BitGen will have a BitGen handle 0. Therefore BG_Scope(0) will return the BitLib handle 2.
{{{
function BG_Space(AHandle : Integer; ATics : Integer) : Integer;
}}}
BG_Space controls the number of master clock rate tics that the clock will be set low. This function is only used in [[BG_Mode]](4) [[Clock Mode]]. The return value is the true tic value set.
The master clock rate in BitGen in BS120U is 30MHz. This implies that one tic is 1/30MHz = 33.33'nS. This means that each BG_Space tic will be 33.33'nS in duration. For example, for a clock signal low for 1uS, call BG_Space with an argument of 30.
Note that there are restrictions on the minimum and maximum BG_Space tic value. The minimum value of BG_Space is 7, and the maximum is 65535.
The low clock period may be set using other [[Clock Setup]] parameter, [[BG_Mark]].
For more information on the Clock Mode can be found [[here|Clock Mode]].
{{{
function BG_Sweep(AHandle : Integer; AStartFreq : Double; AEndFreq : Double) : Double;
}}}
This function can be used to produce chirp burst waveforms.
This function is only valid in [[BG_SyncMode]](1) [[Direct Digital Synthesis|DDS Mode]] when using a burst waveform. The start frequency is determined by the parameter AStartFreq, and the final frequency by AEndFreq. The duration of the burst is determined by [[BG_Duration]]. The return value is the true value of the end frequency. To query the true start frequency, use BG_Freq.
{{{
function BG_SyncMode(AHandle : Integer; AMode : Integer) : Boolean;
}}}
BG_SyncMode selects the BitGen timing and TimePort mode. This parameter must be called after [[BG_Mode]], and before all other [[Setup]] functions. BG_SyncMode will affect the behavior of all other [[Setup]] functions.
The BG_SyncMode parameter controls the functionality of the TimePort (the front panel pin with a small picture of a square wave displayed above it). The TimePort be used as an input or an output, depending on the SyncMode.
The available modes are:
0. TriggerIn - Input a trigger signal to the TimePort
1. ClockIn - Input the sample rate clock
2. GateIn - When the TimePort is asserted high, waveform generation will begin.
3. ClockOut - Send internal clock out the TimePort
4. SyncOut - Assert TimePort high during the BG_BurstMark period.
When not using the TimePort, set BG_SyncMode to 4 (SyncOut) if available to ensure that waveform generation otherwise proceeds immediately.
Note that not all SyncModes are available for each [[BG_Mode]]. See [[Modes]] for a detailed description of each BG_SyncMode.
{{{
function BG_Tic(AHandle : Integer; ATic : Integer) : Integer;
}}}
BG_Tic controls the number of BitGen sample clock tics to use to produce each sample. This is essentially the inverse of the function [[BG_SampleRate]]. The argument ATic is the number of tics for each sample. The return value is the true Tic value set. BG_Tic can be used in all [[BG_Modes|BG_Mode]].
Use this function when greater control over the sample rate is required. For all other purposes use [[BG_SampleRate]].
Note that the master clock rate of BitGen in BS120U/BS100U is 30MHz. This implies that 1 tic is 1/30MHz = 33.3333nS and means that a value of (say) 30 tics set with BG_Tic(0,30) produces a new sample every 1uS. That is, the waveform is generated with a sample rate of 1MHz. Note that each [[BG_Mode]] and [[BG_SyncMode]] have different restrictions on the number of allowable tics. All modes have a maximum of 64k tics.
For more information on tic restrictions and calculating sample rates, see [[Calculating Sample Rates]].
{{{
function BG_Trigger(AHandle : Integer;AEdge : Boolean;ARise : Boolean) : Boolean;
}}}
BG_Trigger controls the trigger parameters. To enable the trigger, select [[BG_SyncMode]](0) TriggerIn. See [[Modes]] for more information on BG_SyncModes.
The trigger mode is not available in all [[BG_Modes|BG_Mode]]. The modes that have a trigger setting are [[VSR Mode]], [[DDS Mode]], [[PinkNoise Mode]] and [[WhiteNoise Mode]].
The trigger is driven via the TimePort, located on the front panel of BS120U or BS100U. All trigger signals are considered to be between 0V to 5V.
If AEdge is true, then the trigger event will occur when an edge is seen on the TimePort. If AEdge is false, then the trigger event will occur when the TimePort is seen as high, that is greater than 2.5V.
ARise is used if AEdge is true. If ARise is true, then the trigger event will occur on a rising edge. If ARise is false then the trigger event will occur on a falling edge.
{{{
function BG_Voltage(AHandle : Integer; AVoltage : Double) : Double;
}}}
BG_Voltage sets the rest voltage of the output waveform. The rest voltage is the voltage that is output during the Trigger phase and the End phase of the [[Timing Cycle]].
The return value is the actual rest voltage set by the BitGen. Note that the value give to BG_Voltage must lie in range of the BitGen hardware itself (-5V and 5V).
If in a burst mode, the rest voltage is not output between bursts. Between bursts, the voltage level will be the first sample of the wavetable. See [[Timing Cycle]] for more information.
BitGen is a integrated DSP waveform, clock and timing generator for BitScope model BS120U. The BitGen is also available an optional module for BS100U.
The BitGen has the following key features:
*Standard generator wave-functions.
*User programmable arbitrary waveforms.
*Continuous, burst, chirp, and noise modes.
*Crystal referenced vari-clock, DDS and PRNG.
*Frequency precision better than 1ppm (DDS).
*Sample jitter below 10nS (variable clock).
*Event timing precision better than 50nS.
*Synchronized clock/timing channel.
*Scope probe compensation signal.
*Clock and voltage generation.
*Logic family level shifter.
BitGen can generate standard wave-functions, clocks, triggers, one-shot bursts, sweeps, chirps, pink/white noise, arbitrary waveforms or even waveforms previously captured with BitScope.
The [[BitGenLib]] library allows developers to create custom applications to control all aspects of the BitGen.
To order BitGen for BS100U (it's standard in BS120U) or to read more about it, view the BitGen web page [[here|http://bitscope.com/product/DWG100/]].
BitGenLib is an external library that contains functions used for controlling a [[BitGen]] module in BS120U or BS100U.
With BitGenLib, a user can control all aspects of the BitGen from any programming language, as long as that language supports external libraries. BitGenLib functions include waveform generation, pseudo random number generators, burst modes and trigger setup.
NOTE: [[BitLib]], the BitScope Programmer's Library must be installed to use the BitGenLib library.
Please see [[Operating BitGenLib]] for more information on using the BitGenLib library.
BitLib is the BitScope Programming Library. With BitLib, a user can control all aspects of the BitScope from any programming language, as long as that language supports external libraries. BitLib functions include triggering, capturing, waveform generator functions, channel setup and streaming.
NOTE: BitLib must be installed to use the [[BitGenLib]] library.
Languages that have been used to create BitLib applications include C/C++, Delphi, Python, MatLab, LabView, Ruby and VB.
To view the BitLib documentation, click <<tiddler ExternalURL with: bitlib "\"Getting Started\"" here>>.
The BitScope Connection Manager is an application that searches the system for connected BitScopes.
The Connection Manager manages the [[Probe File]] for use with other applications. It also allows one to test and configure BitScopes.
The Connection Manager can be downloaded from the [[website|http://www.bitscope.com]].
This entry shows the BitGenLib function definitions in C.
If using C, please include the provided BitGenLib header file bitgen.h.
NOTE: bool is defined as an unsigned char
!!![[Initialization]]
void [[BG_Init]](void);
bool [[BG_Open]](void);
!!![[Log|BG_Log]]
char* [[BG_Log]](void);
!!![[ID Functions]]
int [[BG_Count]](void);
int [[BG_Scope]](int _handle);
void [[BG_Name]](int _handle, char* _str);
!!![[Modes]]
bool [[BG_Mode]](int _handle, int _mode);
bool [[BG_SyncMode]](int _handle, int _mode);
!!![[Voltage Setup]]
double [[BG_Voltage]](int _handle, double _voltage);
double [[BG_Amplitude]](int _handle, double _amplitude);
double [[BG_Offset]](int _handle, double _offset);
double [[BG_Low]](int _handle, double _low);
double [[BG_High]](int _handle, double _high);
!!![[WaveTable|Loading A WaveTable]]
bool [[BG_LoadTable]](int _handle, float* _data, int _size);
!!![[Trigger Setup]]
bool [[BG_Trigger]](int _handle, bool _edge, bool _rise);
double [[BG_HoldOff]](int _handle, double _time);
double [[BG_Delay]](int _handle; double _time);
!!![[Timing Setup]]
double [[BG_Freq]](int _handle, double _freq);
double [[BG_Sweep]](int _handle; double _start_freq, double _end_freq);
int [[BG_Duration]](int _handle, double _time);
int [[BG_BurstMark]](int _handle, double _time);
int [[BG_BurstSpace]](int _handle, double _time);
int [[BG_Repeat]](int _handle, int _count);
!!![[Clock Setup]]
int [[BG_Tic]](int _handle, int _tic);
int [[BG_Factor]](int _handle, int _factor);
int [[BG_Mark]](int _handle, int _tics);
int [[BG_Space]](int _handle, int _tics);
double [[BG_SampleRate]](int _handle, double _rate);
!!![[Generate]]
bool [[BG_Gen]](int _handle);
int [[BG_Halt]](int _handle);
!!![[Close|BG_Close]]
bool [[BG_Close]](int _handle);
Each [[BG_Mode]] and [[BG_SyncMode]] has a different value for its maximum sample rate. These values are shown in the table below.
|!BG_Mode|!BG_SyncMode|!Min Tic|!Sample Rate|!Period|h
|VSR|SyncOut|10|3.000000 MHz|333' nS|
|VSR|TriggerIn|10|3.000000 MHz|333' nS|
|VSR|ClockOut|15|2.000000 MHz|500 nS|
|VSR|ClockIn|15|2.000000 MHz|500 nS|
|DDS|Continuous*|15|2.000000 MHz|500 nS|
|DDS|Burst**|20|1.500000 MHz|666' nS|
|DDS|GateIn|13|2.307692 MHz|433' nS|
|PinkNoise|Continuous*|15|2.000000 MHz|500 nS|
|PinkNoise|Burst**|18|1.666666 MHz|500 nS|
|PinkNoise|GateIn|18|1.666666 MHz|500 nS|
|WhiteNoise|Continuous|15|2.000000 MHz|500 nS|
|WhiteNoise|SyncOut|15|2.000000 MHz|500 nS|
|WhiteNoise|ClockIn|20|1.500000 MHz|666' nS|
|WhiteNoise|ClockOut|20|1.500000 MHz|666' nS|
|Clock|ClockOut|10|3.000000 MHz|333' nS |
|Logic|ClockIn|16|1.875000 MHz|533' nS |
(*) Continuous denotes both TriggerIn and SyncOut [[BG_SyncModes|BG_SyncMode]], but with [[BG_Duration]] is set to 0, see [[Timing Cycle]].
(**) Burst denotes both TriggerIn and SyncOut SyncModes, but with [[BG_Duration]] set to a non-zero value, see [[Timing Cycle]].
The master clock rate on the BitGen module is 30MHz. However, each mode requires a finite number of tics to process instructions. Each of these tics is executed in 1/30MHz = 33.33' nS. From this value we can calculate the maximum sample rate.
The column 'Min Tic' in the table above shows the minimum allowable number of clock tics required for an instruction cycle. For example, for [[BG_Mode]] Logic and [[BG_SyncMode]] ClockIn, we see that the minimum allowable number of tics is 16. This implies that the maximum allowable sample rate is 30MHz/16 = 1.875 MHz.
To calculate the available sample rates, we can choose any number of tics in the range of
{{{
tic = Min Tic ... 65535
}}}
We can then calculate the sample rate from the equation
{{{
rate = 30MHz / tic
}}}
For example, let us say we are in [[BG_Mode]] DDS, [[BG_SyncMode]] GateIn. From the table, we can see that the minimum number of tics is 13. This means that the sample rates allowed for this mode are:
{{{
30MHz/13 = 2.3076923 MHz
30MHz/14 = 2.1428571 MHz
30MHz/15 = 2.0000000 MHz
30MHz/16 = 1.8750000 MHz
.
.
.
30MHz/66534 = 450.8972856 Hz
30MHz/66535 = 450.8905088 Hz
}}}
These values can be selected with the function [[BG_SampleRate]]. [[BG_SampleRate]] will choose the closest possible sample rate to that requested.
NOTE: When in a [[burst mode|Timing Cycle]], choosing large values for the [[Timing Setup]] parameters [[BG_Duration]], [[BG_BurstMark]] or [[BG_BurstSpace]] will affect the maximum allowable sample rate. This is because these parameters each have a maximum allowable value. Internally, these parameters represent registers inside the BitGen virtual machine. Each register represents the number of clock tics required for this phase of the [[Timing Cycle]]. For example, a value of 50 in the [[BG_BurstMark]] register implies that 50 sample rate clock tics are required for the BG_BurstMark phase of the Timing Cycle.
For example, to calculate the register value of the BG_BurstMark register from the uS value given to the function [[BG_BurstMark]], we use the following equation:
{{{
BG_BurstMark register = BG_BurstMark duration / sample rate
}}}
So let us say we give [[BG_BurstMark]] a value of 100uS at a sample rate of 2MHz, then we arrive at the value
{{{
100uS*2MHz = 200
}}}
and the BG_BurstMark register will have a value of 200.
Internally, the BG_BurstMark register is a 16-bit register. This implies that the maximum allowable value is 66535. Now, let us say we want a [[BG_BurstMark]] value of 1 second at a sample rate of 2MHz. We then get the value
{{{
1000000uS*2MHz = 2 000 000
}}}
This value is much greater than 66535, so our 1 second BG_BurstMark will result in an overflow at this sample rate.
To solve this problem, we need to use a slower sample rate. If we want our 1 second BG_BurstMark, let us try the sample rate 50kHz. In this case, out register value will be
{{{
1000000uS*0.05MHz = 50 000
}}}
This value is less than the maximum value 66535, so we are permitted to use our 1 second BG_BurstMark at this sample rate.
This same logic applies to the timing parameters [[BG_BurstSpace]] and [[BG_Duration]]. Note that [[BG_BurstSpace]] is also a 16-bit register like [[BG_BurstMark]], but [[BG_Duration]] is a 32-bit register which gives a maximum value of 4 294 967 296.
Note that the above timing parameter sample rate restriction does not occur when the value for [[BG_Duration]] is 0. This is a continuous mode, and [[BG_BurstSpace]] and [[BG_BurstMark]] are ignored.
The Clock Mode allows users to generate clock signals from the BitGen. The Clock Mode allows users to control the rate and symmetry of their clock signal.
The Clock Mode only uses the TimePort. POD pin 26 is not used in this mode. This mode also only uses [[BG_SyncMode]](3) ClockOut.
In Clock Mode, the sample rate is always set to the master clock rate of 30MHz. [[BG_SampleRate]] and [[BG_Tic]] do not control the sample rate in this mode. The sample rate is controlled with [[BG_Mark]] and [[BG_Space]]. [[BG_Mark]] and [[BG_Space]] control the number of tics that the clock signal is to be set high and low respectively. Note that 1 tic is 1/30MHz = 33.33' nS in duration.
!!Example
Say we wish to output a 500kHz clock signal out the TimePort, with a duty cycle of 75%. If 1 tic is 33.33', then we need 60 tics to produce one 2uS period of our 500kHz clock signal. This means that we need 45 tics high and 15 tics low to produce our 75% duty cycle. So:
{{{
//=======
// talking to BitGen at index 0...
//=======
handle=0;
//==================
// Set the mode...
//==================
BG_Mode(handle,4); // Clock mode
BG_SyncMode(handle,3); // ClockOut, this is the only relevant SyncMode for Clock Mode
BG_Mark(45); // 45 tics which are 33.33' nS in duration
BG_Space(15); // 15 tics
//===========
// Generate...
//===========
BG_Gen(handle);
//=============
// The clock signal should be present on the TimePort...
//==============
}}}
The Clock Setup parameters control the BitGen clock rate.
The functions [[BG_SampleRate]] and [[BG_Tic]] set the internal BitGen clock rate. Note that this clock rate is independent from the BitScope clock rate. [[BG_SampleRate]] and [[BG_Tic]] are valid in all [[BG_Modes|BG_Mode]] except [[Clock Mode]].
Note that if one for not choose a [[BG_SampleRate]] or [[BG_Tic]] then the fastest possible sample rate is chosen based on the prevailing [[Mode|Modes]] and [[Timing Setup]] selections.
[[Clock Mode]] gives the user more control over the clock. In clock mode [[BG_SampleRate]] and [[BG_Tic]] will be set to the master clock rate 30MHz. The high and low periods of the clock signal are controlled with [[BG_Mark]] and [[BG_Space]]. See [[Clock Mode]] for further details.
[[BG_Factor]] controls the decimation factor used for each clock bit flip in the [[BG_SyncMode]](3), ClockOut.
Background: #fff
Foreground: #000
PrimaryPale: #8cf
PrimaryLight: #3af
PrimaryMid: #008
PrimaryDark: #014
SecondaryPale: #ffc
SecondaryLight: #fe8
SecondaryMid: #db4
SecondaryDark: #000
TertiaryPale: #eee
TertiaryLight: #ccc
TertiaryMid: #999
TertiaryDark: #666
Error: #f88
config.options.chkAnimate = false;
To connect to a BitScope, one must use [[BitLib]], the BitScope Programmer's Library.
To connect to a BitGen, a [[BitLib]] link must be opened on that BitScope first.
To connect to a BitScope with [[BitLib]] use the [[probe file|Probe File]] functionality. The probe file is a file that stores links to BitScopes. Each link is defined in the following way
{{{
PROTOCOL:ADDRESS
}}}
where PROTOCOL is one of UDP, USB, TTY or NIL. ADDRESS is the IP address or com port of the BitScope. For more information on links, see [[Probe File]].
In [[BitLib]] connect to a BitScope with a probe file with 2 functions <<tiddler ExternalURL with: bitlib BL_Open BL_Open>> or <<tiddler ExternalURL with: bitlib BL_OpenLink BL_OpenLink>>. Firstly <<tiddler ExternalURL with: bitlib BL_Open BL_Open>> will take the name of a probe file and attempt to open all the links inside the probe file. The function will return true if any BitScope was opened successfully. Note that the probe file name that is entered is a filename only, with no path. The path of the probe file is fixed, and lives in 2 places on the system. See [[Probe File]] for details. As an example, let us take a simple BitLib program where we open a link and close the link:
{{{
BL_Initialize(); // This must be called once before using the library
BL_Open("bitscope.prb",true); // open all the links in the file bitscope.prb
BL_Close(); // close the opened links
}}}
Here the second argument of BL_Open is set to true. This argument determines whether to return after the first successful link or to open all links listed in the probe file. Here we have selected to open all the links listed in bitscope.prb. It is also possible to send BL_Open a list of links separated by carriage returns. For example:
{{{
BL_Initialize(); // This must be called once before using the library
BL_Open("USB:COM4\n UDP:sydney.bitscope.net\n USB:COM5",false); // open links in the file
BL_Close(); // close the opened links
}}}
Here BL_Open will attempt to open each of the three links, but will return once the first successful link is found.
The second way to connect to a BitScope is with the function <<tiddler ExternalURL with: bitlib BL_OpenLink BL_OpenLink>>. This will attempt to open a single link and return the BitLib address. If the open was unsuccessful BL_OpenLink will return -1. For example
{{{
BL_Initialize();
index=BL_OpenLink("USB:/dev/ttyUSB0");
printf("Link opened at %d.",index);
BL_Close();
}}}
Also note that <<tiddler ExternalURL with: bitlib BL_Close BL_Close>> will close all the opened BitScope links.
This page describes how to connect to a BitGen module using the BitGenLib library.
First, [[initialize the library|Initialization]] and then open BitGen with a call to [[BG_Open]]. This searches all the opened [[BitLib]] links for a BitGen module. [[BG_Open]] will open all BitGen modules that are found on the opened BitLib links.
To see how many successful links were opened, use [[BG_Count]]. The handles assigned to the opened BitGen links are 0..[[BG_Count]]-1. To see the BitLib link name of the BitGen, use [[BG_Name]]. To see the corresponding BitLib handle, use [[BG_Scope]]. See [[ID Functions]] for more information on identifying BitScopes.
!!Example
The following example shows how to connect to a BS100U with BitGen installed at COM4:
{{{
//===============
// First initialize the BITLIB library
//===============
BL_Initialize(); // Initialize the library...
index=BL_OpenLink("USB:COM4"); // Open a BitScope link...
//===============
// Initialize the BITGEN library
//===============
BG_Init(); // Initialize the BitGen library...
BG_Open(); // Open the BitGen module...
//===============
// Check success
//===============
if (BG_Count()<=0) {
printf("Failed to find a BitGen.\n");
exit;
}
//===============
// Print stats....
//===============
for(i=0;i<BG_Count();i++){
BG_Name(i,str);
printf("BitGen %i has name %s \n",i,str);
printf("BitGen %i is in BitLib scope %i",i,BG_Scope(i));
}
//==============
// Do stuff...
//===============
}}}
The Direct Digital Synthesis mode allows the user to play a waveform from the wavetable. This mode allows the user to produce burst waveforms, continuous waveforms and chirps. This mode is the most flexible mode and should be used in most cases to play a wavetable.
In this mode, the wavetable is a fixed size at 1024, and can be loaded with the function [[BG_LoadTable]]. In DDS mode, a floating point step size is available when iterating through the wavetable, so a high precision frequency is available. However, a floating point step size implies that jitter may be visible in the waveshape between successive periods as a floating point step is rounded to the nearest sample.
This mode plays continuous waveforms or burst waveforms. To set the frequency in either case, use [[BG_Freq]]. To set the timing of the burst waveforms use the [[Timing Setup]] parameters. In this mode, if a specific sample rate is required, set it with [[BG_SampleRate]]. If [[BG_SampleRate]] is not called, then the fastest possible sample rate will be chosen.
It is also possible to use a chirp function with the DDS mode. Use [[BG_Sweep]] to set the initial and final frequency of the chirp.
!!Available SyncModes
This table shows which BG_SyncModes are available with the DDS mode.
|Mode\SyncMode|!TriggerIn|!ClockIn|!GateIn|!ClockOut|!SyncOut|h
|!DDS|Yes|No|Yes|No|Yes|
!!Example
Let us assume we have a BS100U with a BitGen connected to "USB:COM3".
Let us say we wish to output a string of infinite bursts, each 1mS long. Say we want each burst to be a 10kHz square wave between 0V..3V. Let us say we want a 5mS gap between each burst, and that we would like the TimePort to indicate when a waveform is starting.
To do this, we must set up [[BG_Mode]](1) DDS, and [[BG_SyncMode]](4) SyncOut. This SyncMode will set the TimePort high during the [[BG_BurstMark]] period. Therefore, a falling edge on the TimePort will coincide with the start of the square wave burst. Let us say we want this pre-burst [[BG_BurstMark]] signal to be 100uS. Remember that the gap between the burst is [[BG_BurstMark]] + [[BG_BurstSpace]]. This implies that to have a total gap of 5mS, we need a [[BG_BurstSpace]] delay of 4900uS to combine with our 100uS [[BG_BurstMark]] delay.
We must also fill the wavetable with our square wave, and in DDS Mode, the wavetable must be 1024 points. Note that we must ensure that the end points are the correct values. The end points are important, as the values define the output voltage that will exist after a waveform or burst has completed. We can then fill our wavetable like so:
{{{
//========
// fill a 1024 point wavetable with a square wave...
//========
const int WT_SIZE = 1024;
int arr[WT_SIZE];
for(i=0;i<WT_SIZE;i++){
if (i<WT_SIZE/2) {
arr[i]=-1.0;
} else {
arr[i]=1.0;
}
}
arr[0] = 0.0;
arr[WT_SIZE-1] = 0.0; // make sure the end points are correct
}}}
Putting all this together results in something like:
{{{
//==================
// Connect to the BitScope with BITLIB
//==================
BL_Initialize();
BL_OpenLink("USB:/dev/ttyUSB0");
//==================
// Connect to the BitGen with BitGenLib
//===================
BG_Init();
BG_Open();
//===========
// ...talking to BitScope at address 0
//============
handle=0;
//==================
// Set the mode...
//==================
BG_Mode(handle,1); // DDS mode...
BG_SyncMode(handle,4); // SyncOut, ignore trigger and TimePort
//==================
// Load the WAVETABLE
//==================
BG_LoadTable(handle,arr,1024); // arr is our 1024 point sq wave table
//====================
// Set the VOLTAGE
//====================
BG_Amplitude(handle,3); // 3V peak to peak...
BG_Offset(handle,1.5); // ...between 0V..3V
//==================
// Set the timing parameters...
//==================
BG_Freq(10000); // replay at 10kHz
BG_Duration(1e-3); // 1mS duration...
BG_BurstMark(1e-4); // 100uS TimePort pulse
BG_BurstSpace(4.9e-3); // 4900uS makes up the rest of the 5mS gap...
BG_Repeat(0); // repeat forever...
//=================
// Generate...
//=================
BG_Gen(handle);
//=================
// Waveform should now be present on POD pin 26. The TimePort
// will be set high during the BG_BurstMark period. A falling
// signal on the TimePort indicates the start of the waveform.
//
// Capture the waveform using BitLib if required.
//=================
}}}
/***
|Name|DisableWikiLinksPlugin|
|Source|http://www.TiddlyTools.com/#DisableWikiLinksPlugin|
|Version|1.6.0|
|Author|Eric Shulman|
|License|http://www.TiddlyTools.com/#LegalStatements|
|~CoreVersion|2.1|
|Type|plugin|
|Description|selectively disable TiddlyWiki's automatic ~WikiWord linking behavior|
This plugin allows you to disable TiddlyWiki's automatic ~WikiWord linking behavior, so that WikiWords embedded in tiddler content will be rendered as regular text, instead of being automatically converted to tiddler links. To create a tiddler link when automatic linking is disabled, you must enclose the link text within {{{[[...]]}}}.
!!!!!Usage
<<<
You can block automatic WikiWord linking behavior for any specific tiddler by ''tagging it with<<tag excludeWikiWords>>'' (see configuration below) or, check a plugin option to disable automatic WikiWord links to non-existing tiddler titles, while still linking WikiWords that correspond to existing tiddlers titles or shadow tiddler titles. You can also block specific selected WikiWords from being automatically linked by listing them in [[DisableWikiLinksList]] (see configuration below), separated by whitespace. This tiddler is optional and, when present, causes the listed words to always be excluded, even if automatic linking of other WikiWords is being permitted.
Note: WikiWords contained in default ''shadow'' tiddlers will be automatically linked unless you select an additional checkbox option lets you disable these automatic links as well, though this is not recommended, since it can make it more difficult to access some TiddlyWiki standard default content (such as AdvancedOptions or SideBarTabs)
<<<
!!!!!Configuration
<<<
<<option chkDisableWikiLinks>> Disable ALL automatic WikiWord tiddler links
<<option chkAllowLinksFromShadowTiddlers>> ... except for WikiWords //contained in// shadow tiddlers
<<option chkDisableNonExistingWikiLinks>> Disable automatic WikiWord links for non-existing tiddlers
Disable automatic WikiWord links for words listed in: <<option txtDisableWikiLinksList>>
Disable automatic WikiWord links for tiddlers tagged with: <<option txtDisableWikiLinksTag>>
<<<
!!!!!Revisions
<<<
2008.07.22 [1.6.0] hijack tiddler changed() method to filter disabled wiki words from internal links[] array (so they won't appear in the missing tiddlers list)
2007.06.09 [1.5.0] added configurable txtDisableWikiLinksTag (default value: "excludeWikiWords") to allows selective disabling of automatic WikiWord links for any tiddler tagged with that value.
2006.12.31 [1.4.0] in formatter, test for chkDisableNonExistingWikiLinks
2006.12.09 [1.3.0] in formatter, test for excluded wiki words specified in DisableWikiLinksList
2006.12.09 [1.2.2] fix logic in autoLinkWikiWords() (was allowing links TO shadow tiddlers, even when chkDisableWikiLinks is TRUE).
2006.12.09 [1.2.1] revised logic for handling links in shadow content
2006.12.08 [1.2.0] added hijack of Tiddler.prototype.autoLinkWikiWords so regular (non-bracketed) WikiWords won't be added to the missing list
2006.05.24 [1.1.0] added option to NOT bypass automatic wikiword links when displaying default shadow content (default is to auto-link shadow content)
2006.02.05 [1.0.1] wrapped wikifier hijack in init function to eliminate globals and avoid FireFox 1.5.0.1 crash bug when referencing globals
2005.12.09 [1.0.0] initial release
<<<
!!!!!Code
***/
//{{{
version.extensions.DisableWikiLinksPlugin= {major: 1, minor: 6, revision: 0, date: new Date(2008,7,22)};
if (config.options.chkDisableNonExistingWikiLinks==undefined) config.options.chkDisableNonExistingWikiLinks= true;
if (config.options.chkDisableWikiLinks==undefined) config.options.chkDisableWikiLinks=true;
if (config.options.txtDisableWikiLinksList==undefined) config.options.txtDisableWikiLinksList="DisableWikiLinksList";
if (config.options.chkAllowLinksFromShadowTiddlers==undefined) config.options.chkAllowLinksFromShadowTiddlers=true;
if (config.options.txtDisableWikiLinksTag==undefined) config.options.txtDisableWikiLinksTag="excludeWikiWords";
// find the formatter for wikiLink and replace handler with 'pass-thru' rendering
initDisableWikiLinksFormatter();
function initDisableWikiLinksFormatter() {
for (var i=0; i<config.formatters.length && config.formatters[i].name!="wikiLink"; i++);
config.formatters[i].coreHandler=config.formatters[i].handler;
config.formatters[i].handler=function(w) {
// supress any leading "~" (if present)
var skip=(w.matchText.substr(0,1)==config.textPrimitives.unWikiLink)?1:0;
var title=w.matchText.substr(skip);
var exists=store.tiddlerExists(title);
var inShadow=w.tiddler && store.isShadowTiddler(w.tiddler.title);
// check for excluded Tiddler
if (w.tiddler && w.tiddler.isTagged(config.options.txtDisableWikiLinksTag))
{ w.outputText(w.output,w.matchStart+skip,w.nextMatch); return; }
// check for specific excluded wiki words
var t=store.getTiddlerText(config.options.txtDisableWikiLinksList);
if (t && t.length && t.indexOf(w.matchText)!=-1)
{ w.outputText(w.output,w.matchStart+skip,w.nextMatch); return; }
// if not disabling links from shadows (default setting)
if (config.options.chkAllowLinksFromShadowTiddlers && inShadow)
return this.coreHandler(w);
// check for non-existing non-shadow tiddler
if (config.options.chkDisableNonExistingWikiLinks && !exists)
{ w.outputText(w.output,w.matchStart+skip,w.nextMatch); return; }
// if not enabled, just do standard WikiWord link formatting
if (!config.options.chkDisableWikiLinks)
return this.coreHandler(w);
// just return text without linking
w.outputText(w.output,w.matchStart+skip,w.nextMatch)
}
}
Tiddler.prototype.coreAutoLinkWikiWords = Tiddler.prototype.autoLinkWikiWords;
Tiddler.prototype.autoLinkWikiWords = function()
{
// if all automatic links are not disabled, just return results from core function
if (!config.options.chkDisableWikiLinks)
return this.coreAutoLinkWikiWords.apply(this,arguments);
return false;
}
Tiddler.prototype.disableWikiLinks_changed = Tiddler.prototype.changed;
Tiddler.prototype.changed = function()
{
this.disableWikiLinks_changed.apply(this,arguments);
// remove excluded wiki words from links array
var t=store.getTiddlerText(config.options.txtDisableWikiLinksList,"").readBracketedList();
if (t.length) for (var i=0; i<t.length; i++)
if (this.links.contains(t[i]))
this.links.splice(this.links.indexOf(t[i]),1);
};
//}}}
<script>
var web = ""
var perma = "#"
switch ("$1") {
case "bitlib": web = "BitLibAPI.html"; break;
case "bitgen": web = "BitGenAPI.html"; break;
case "bcm": web = "http://www.bitscope.com/"; perma=""; break;
default: return "";
}
return "[[$3|"+web+perma+"$2]]"
</script>
To Generate the waveform, use the function [[BG_Gen]].
[[BG_Gen]] will initiate the [[Timing Cycle]], and generate the waveform based on your [[mode|Modes]] and [[setup|Setup]] parameters. The [[BG_Gen]] function will return instantly, and leave the BitGen in the [[Timing Cycle]].
[[BG_Gen]] will first update all the BitGen registers before starting the [[Timing Cycle]]. In BitGenLib, any [[mode|Modes]] or [[setup|Setup]] parameter call does not update the registers on the module until [[BG_Gen]] is called. For example, when generating a waveform, calling [[BG_Freq]] with a new frequency will not update the output frequency until [[BG_Gen]] is called again.
NOTE: The two functions [[BG_Amplitude]] and [[BG_Offset]] do not obey this rule. These functions will update the output waveform when they are called. That is, when generating a waveform with [[BG_Gen]], you may change the [[BG_Amplitude]] and [[BG_Offset]] parameters to alter the output waveform. This is because [[BG_Amplitude]] and [[BG_Offset]] control the voltage output of the BitScope, not the BitGen. The BitGen and the BitScope operate independently.
When a BitGen is generating waveform, BS120U/BS100U can still capture waveforms. If a BitGen is generating waveform on ChB, it is possible for [[BitLib]] to capture ChB and see the waveform, without disturbing the BitGen. It is also possible to generate waveforms with BitGen on ChB, send them to a circuit, and capture the output on ChA.
[[BitGenLib|Operating BitGenLib]] is a programming library for the [[BitGen]] DSP waveform generator.
Like BitScope itself, BitGen is a programmable Virtual Machine (VM). This library abstracts the VM into a [[functional API|C Function API]] that supports [[connecting to BitGen|Connecting To BitGen]], [[setting the generator operating mode|Modes]], [[setting up parameters|Setup]], [[loading a wavetable|Loading A WaveTable]] and [[generating waveforms|Generate]].
To use this document, simply click links in the text or on the menu on the right or use the //search box// (below right) to find all entries containing a search term.
Click //close// in the top right corner of an an entry to close it. To see all references to the current entry click //more// and then //references//. Click //edit// to add notes to any entry (you can only do this on a local copy of this file).
To get started, select a function from the menu on the right or read [[Operating BitGenLib]], [[Pascal Function API]] or [[Connecting To BitGen]].
To get started with this blank [[TiddlyWiki]], you'll need to modify the following tiddlers:
* [[SiteTitle]] & [[SiteSubtitle]]: The title and subtitle of the site, as shown above (after saving, they will also appear in the browser title bar)
* [[MainMenu]]: The menu (usually on the left)
* [[DefaultTiddlers]]: Contains the names of the tiddlers that you want to appear when the TiddlyWiki is opened
You'll also need to enter your username for signing your edits: <<option txtUserName>>
The ID functions allow a user to determine information about BitGen links once [[BG_Open]] is called.
The functions available are [[BG_Count]], [[BG_Name]] and [[BG_Scope]].
[[BG_Count]] returns the number of BitGen links that are open. A BitGen link will only be opened if an attached BitScope is BS120U or BS100U with a BitGen module installed. This number will always be less than or equal to the number of [[BitLib]] links.
[[BG_Name]] returns the [[BitLib]] link name. Examples include "USB:COM4" or "USB:/dev/ttyUSB0".
[[BG_Scope]] returns the [[BitLib]] index given a BitGen index.
Initializing [[BitGenLib]] comprises of two parts: initializing and connecting to BitScope using [[BitLib]] and then initialising and connecting BitGen using [[BitGenLib]]. Both libraries must be installed before [[BitGen]] can be used.
First, [[BitLib]] is initialized using <<tiddler ExternalURL with: bitlib BL_Initialize BL_Initialize>> which initializes the library. It should be called before any other BitLib function. It should be called once when the applications starts.
Next, connect to (one or more) BitScope(s) using <<tiddler ExternalURL with: bitlib BL_Open BL_Open>> or <<tiddler ExternalURL with: bitlib BL_OpenLink BL_OpenLink>>. See [[Connecting To A BitScope]] or the BitLib <<tiddler ExternalURL with: bitlib "\"Getting Started\"" documentation>> for more information.
Once connection to the BitScope has been established, connection to [[BitGen]] is possible using BitGenLib. Initialize the BitGen library with [[BG_Init]]. This function should be called only once during your application after <<tiddler ExternalURL with: bitlib BL_Initialize BL_Initialize>> but before any other BitGenLib function is called.
Once initialized, connect to the [[BitGen]] module itself with the function [[BG_Open]]. This searches the list of opened [[BitLib]] links, and attempts to open any BitGen that is found. If at least one BitGen was successfully opened then [[BG_Open]] will return true.
To extract ID information from the connected BitScopes, use the [[ID Functions]] to view values such the link name, address etc.
!!Example
Open the BitScope at USB:COM4 using [[BitLib]], and attempt to open the [[BitGen]].
{{{
//===============
// First initialize the BITLIB library
//===============
BL_Initialize(); // Initialize the library...
index=BL_OpenLink("USB:COM4"); // Open a BitScope link...
//===============
// Initialize the BITGEN library
//===============
BG_Init(); // Initialize the BitGen library...
BG_Open(); // Open the BitGen module...
//===============
// Check success
//===============
printf("You opened %i BitGen(s).\n",BG_Count());
}}}
/***
|Name|InlineJavascriptPlugin|
|Source|http://www.TiddlyTools.com/#InlineJavascriptPlugin|
|Documentation|http://www.TiddlyTools.com/#InlineJavascriptPluginInfo|
|Version|1.9.5|
|Author|Eric Shulman|
|License|http://www.TiddlyTools.com/#LegalStatements|
|~CoreVersion|2.1|
|Type|plugin|
|Description|Insert Javascript executable code directly into your tiddler content.|
''Call directly into TW core utility routines, define new functions, calculate values, add dynamically-generated TiddlyWiki-formatted output'' into tiddler content, or perform any other programmatic actions each time the tiddler is rendered.
!!!!!Documentation
>see [[InlineJavascriptPluginInfo]]
!!!!!Revisions
<<<
2009.04.11 [1.9.5] pass current tiddler object into wrapper code so it can be referenced from within 'onclick' scripts
2009.02.26 [1.9.4] in $(), handle leading '#' on ID for compatibility with JQuery syntax
|please see [[InlineJavascriptPluginInfo]] for additional revision details|
2005.11.08 [1.0.0] initial release
<<<
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Each BitGen has an internal wavetable of up to 1024 points. Each wavetable entry is a double, with values from -1 to 1.
This wavetable is used to replay waveforms in the BitGen modes BG_Mode(1) [[Direct Digital Synthesis|DDS Mode]] and BG_Mode(0) [[Variable Sample Rate|VSR Mode]]. The wavetable is ignored in all other BG_Modes.
A wavetable can be loaded with the function [[BG_LoadTable]]. This takes an array of values and adds them to the wavetable. The values in the wavetable are between -1 and 1, and each value represents a level of the 8-bit digital to analog converter. The range of the converter can set with the functions [[BG_Amplitude]] and [[BG_Offset]]. This implies that a value of -1 in the wavetable corresponds to the voltage [[BG_Offset]] - [[BG_Amplitude]]/2, and a wavetable value of 1 corresponds to a voltage of [[BG_Offset]] + [[BG_Amplitude]]/2.
Note that in BG_Mode(1) [[Direct Digitial Synthesis|DDS Mode]] the wavetable size is fixed at 1024. Sending a wavetable to [[BG_LoadTable]] with a number other than 1024 will result in an error.
BG_Mode(0) [[Variable Sample Rate|VSR Mode]] can have a variable wavetable size from 2 to 1024 samples. In this mode, the replay frequency can be calculated from the [[BG_SampleRate]] and the wavetable size with the equation
{{{
freq = BG_SampleRate / wavetable size
}}}
Assuming the wavetable contains one period of the waveform.
The Logic Mode is a logic level shifter.
Any logic function present on the TimePort will be replayed out POD pin 26. The logic signal on the TimePort should be between 0V and 5V. The output signal levels are defined with the functions [[BG_High]] and [[BG_Low]].
!!Example
Say you have a 0-5V logic signal, and you wish to invert it and convert it to 0-3V. You can set up the BitGen as follows:
{{{
//=======
// talking to BitGen at index 0...
//=======
handle=0;
//==================
// Set the mode...
//==================
BG_Mode(handle,5); // Logic mode
BG_SyncMode(handle,1); // ClockIn, this is the only relevant SyncMode for Logic Mode
BG_SampleRate(1e6); // Sample rate in Hz
BG_High(0.0); // convert the logic high to 0V
BG_Low(3.0); // convert the logic low to 3V
//===========
// Generate...
//===========
BG_Gen(handle);
//==========
// Now any 0-5V logic signal on the TimePort will be an inverted 0-3V signal...
//===========
}}}
[[Getting Started]]
[[Pascal Function API]]
[[C Function API]]
[[Initialization]]
[[Connecting To BitGen]]
[[Operating BitGenLib]]
[[Timing Cycle]]
[[Log Functions|BG_Log]]
[[ID Functions]]
[[Modes]]
[[Setup]]
[[Generate]]
[[Close BitGen|BG_Close]]
[[Troubleshooting]]
Each [[BG_Mode]] and [[BG_SyncMode]] has a different maximum sample rate.
The fastest available sample rates are shown in the table below:
|!BG_Mode|!BG_SyncMode|!Sample Rate|h
|VSR|SyncOut|3.000000 MHz|
|VSR|TriggerIn|3.000000 MHz|
|VSR|ClockOut|2.000000 MHz|
|VSR|ClockIn|2.000000 MHz|
|DDS|Continuous*|2.000000 MHz|
|DDS|Burst**|1.500000 MHz|
|DDS|GateIn|2.307692 MHz|
|PinkNoise|Continuous*|2.000000 MHz|
|PinkNoise|Burst**|1.666666 MHz|
|PinkNoise|GateIn|1.666666 MHz|
|WhiteNoise|Continuous|2.000000 MHz|
|WhiteNoise|SyncOut|2.000000 MHz|
|WhiteNoise|ClockIn|1.500000 MHz|
|WhiteNoise|ClockOut|1.500000 MHz|
|Clock|ClockOut|3.000000 MHz|
|Logic|ClockIn|1.875000 MHz|
(*) Continuous denotes both TriggerIn and SyncOut [[BG_SyncModes|BG_SyncMode]], but with [[BG_Duration]] is set to 0, see [[Timing Cycle]].
(**) Burst denotes both TriggerIn and SyncOut SyncModes, but with [[BG_Duration]] set to a non-zero value, see [[Timing Cycle]].
For more information on sample rate calculation, see [[Calculating Sample Rates]].
When using BitGenLib, you must select two modes [[BG_Mode]] and [[BG_SyncMode]]. These modes must be selected before any other [[Setup]] parameters, as they will affect the BitGen behavior.
!!BG_Mode
[[BG_Mode]] controls the BitGen's primary mode of operation. The modes available are as follows:
{{{
0. VSR - Variable Sample Rate
1. DDS - Direct Digital Synthesis
2. PinkNoise - Pseudo Random Number Generator
3. WhiteNoise - Pseudo Random Number Generator
4. Clock - Clock Mode
5. Logic - Generate Logic Signals
6. Reference - Reference voltages
}}}
A brief description of the modes is given below:
!!!VSR
The [[Variable Sample Rate Mode|VSR Mode]] is a wavetable replay mode. This mode has a variable [[wavetable|Loading A WaveTable]] size and the frequency is adjusted with the [[BG_SampleRate]] parameter. This mode can only play continuous waveforms, and does not allow bursts.
NOTE: This mode should only be used if precise sample rates or the fastest frequencies are required. In all other cases you should use DDS mode. VSR mode is a subset of the DDS mode.
!!!DDS
The [[Direct Digital Synthesis Mode|DDS Mode]] is a wavetable replay mode. This is the most flexible mode, and allows continuous waveform, burst waveform, gated bursts and chirp waveforms. This mode should be used for wavetable replay in most cases.
!!!PinkNoise
The [[Pink Noise Mode|PinkNoise Mode]] is a pseudo random number generator mode. This mode allows continuous waveform and burst replay. Random values output are between the voltages set by the [[Voltage Setup]] parameters.
!!!WhiteNoise
The [[White Noise Mode|WhiteNoise Mode]] is a pseudo random number generator mode. This mode allows only continuous waveform generation. Only two possible voltage values are output in this mode, high and low.
!!!Clock
The [[Clock Mode]] simply outputs the clock signal to the TimePort. This mode does not read the wavetable or output a signal on POD pin 26. Only the TimePort is used in this mode. The Clock Mode can be controlled with the [[Clock Setup]] parameters.
!!!Logic
The [[Logic Mode]] takes an input signal from the TimePort, and replays it on POD pin 26 at the levels logic low and logic high. This mode is a logic level shifter. The logic levels are controlled with the functions [[BG_High]] and [[BG_Low]].
!!!Reference
The [[Reference Mode]] allows the user to output DC voltages. There are three relevant calls in this mode: [[BG_Voltage]], [[BG_High]] and [[BG_Low]]. [[BG_Voltage]] will output a voltage on POD pin 26. [[BG_High]] and [[BG_Low]] will output logic high and low logic voltages on the TimePort. Each of these functions will output voltages after returning. You do not need to call [[BG_Gen]] in this mode.
!!BG_SyncMode
[[BG_SyncMode]] controls the trigger and external TimePort functionality. The available modes are:
{{{
0. TriggerIn - trigger the wavegen from the TimePort
1. ClockIn - use a driving clock signal on the TimePort
2. GateIn - use a gate signal
3. ClockOut - send the a clock signal out the TimePort
4. SyncOut - send the BG_BurstMark signal out the TimePort
}}}
Note that not all these BG_SyncModes are available for each BG_Mode. To see which modes are available, see the table at the end of this wiki entry.
A brief description of the sync modes is given below:
!!!TriggerIn
The TriggerIn mode enables the trigger. You can set the trigger parameters with the function [[BG_Trigger]]. A trigger signal can then be placed on the TimePort. Once [[BG_Gen]] is called, the BitGen will be in the Trigger phase of the [[Timing Cycle]]. In this phase, the BitGen waits until a trigger event is seen on the TimePort.
Note that the Trigger phase only occurs once per [[BG_Gen]] call. The trigger is not used to trigger each burst, only the start of the [[Timing Cycle]]. To trigger on each burst, use the GateIn mode.
!!!ClockIn
In the ClockIn mode, you do not have to use the internal sample rate clock. A clock signal can be placed on the TimePort input to drive the waveform generator.
!!!GateIn
This mode allows bursts to be triggered with a signal on the TimePort. When the TimePort is set high, the BitGen will start playing the wavetable.
!!!ClockOut
This mode sends the clock signal out the TimePort.
!!!SyncOut
This mode sets the TimePort high during the [[BG_BurstMark]] phase of the [[Timing Cycle]]. The [[BG_BurstMark]] phase is the delay period that occurs before each waveform burst ([[BG_Duration]] phase). If [[BG_BurstMark]] is set to zero, then a small spike will still appear on the TimePort.
This mode is useful if you wish to trigger on the start of a waveform burst. A falling edge on the TimePort coincides with the start of the burst.
This mode should also be used when not using the trigger or gate.
!!Available Modes
This table shows which BG_SyncModes are available with each BG_Mode.
|Mode\SyncMode|!TriggerIn|!ClockIn|!GateIn|!ClockOut|!SyncOut|h
|!VSR|Yes|Yes|No|Yes|Yes|
|!DDS|Yes|No|Yes|No|Yes|
|!PinkNoise|Yes|No|Yes|No|Yes|
|!WhiteNoise|Yes|Yes|No|Yes|Yes|
|!Clock|No|No|No|Yes|No|
|!Logic|No|Yes|No|No|No|
|!Reference|No|No|No|Yes|No|
Following is an outline of [[BitGenLib]] library usage and a brief description of the basic BitGenLib functions. Functions are demonstrated by way an example.
!!Overview
Although [[BitGen]] can operate in several different modes, each mode follows this procedure:
{{{
Initialize -> Set Mode -> Load Wavetable -> Setup -> Generate -> Close.
}}}
In the [[Initialize|Initialization]] stage, one must first connect to the BitGen enabled BitScope with [[BitLib]], and then connect to the [[BitGen]]. Next, in the [[Set Mode|Modes]] stage, the BitGen mode of operation must be selected, then the [[wavetable must be loaded|Loading A WaveTable]] and [[Setup]] used to establish the voltage and timing parameters. Upon calling [[Generate]] the waveform will appear at the WavePort (POD pin 26) and the clock of synchronization signals at the TimePort (front panel pin).
!!Initialize
To [[Initialize|Initialization]] the BitGen module, open the BitScope with the [[BitLib]] library and use the BitLib functions <<tiddler ExternalURL with: bitlib BL_Initialize BL_Initialize>> and <<tiddler ExternalURL with: bitlib BL_Open BL_Open>> to connect to a BitScope with BitLib. For more information see [[Connecting To A BitScope]].
Once connected to BitScope, initialize the BitGen library. First, call [[BG_Init]], to initialize the library, then [[connect to BitGen|Connecting To BitGen]] using the function [[BG_Open]].
Identification information can be obtained from open links using the [[ID Functions]].
!!Set Mode
There are two [[modes|Modes]] that need to be set in order to use BitGenLib.
The first is [[BG_Mode]], which sets the major operating mode of the generator, such as wavetable replay, clock generation or pseudo random number/noise generation.
The second minor mode [[BG_SyncMode]] controls the timing, trigger, and external clock operation.
Both modes MUST be set before any other parameters are assigned as their assignment modifies the core functionality of BitGen.
For more information on BG_Modes and BG_SyncModes, see the entry [[Modes]].
!!Load WaveTable
BitGen is an arbitrary waveform generator which means it can generate any waveform programmed to its wavetable. The wavetable is a sample array which stores between 2 to 1024 sample points per waveform period. Note that different [[BG_Mode]] settings place different restrictions on the size of the wavetable and in the case of some modes such as noise or voltage generation, the wavetable is not used at all. See [[Loading A WaveTable]].
!!Setup
There are several parameters that need to be setup in order for the BitGen to generate waveforms including [[Voltage Setup]], [[Trigger Setup]] and [[Timing Setup]] parameters.
See [[Setup]] for mode information.
!!Generate
Once the modes have been chosen and the BitGen setup correctly, the waveform generator [[Timing Cycle]] can be started with the function [[BG_Gen]] to start generation. For a simple burst loop, the BitGen will enter the following (simplified) timing cycle:
{{{
BG_Duration -> BG_BurstSpace -> return to BG_Duration BG_Repeat times
}}}
The waveform will appear during the [[BG_Duration]] phase, output a DC voltage for the [[BG_BurstSpace]] delay phase, then repeat.
BitScope and BitGen are synchronised but operate independently. It is therefore possible to play BitGen waveforms and capture them (with [[BitLib]]) simultaneously.
See [[Generate]] or [[Timing Cycle]] for more information.
!!Closing
When the program is complete or BitGen links are no longer needed, each open link should be closed with [[BG_Close]]. This will NOT close the library, only the links. To reconnect, simply call [[BG_Open]] again but never call [[BG_Init]] again unless restarting the entire application.
!!Example
In this simple pseudo-code example, we assume there is a BS120U connected to COM4. Let us say we want to produce a stream of 10 bursts, with each burst having the following parameters:
Freq=2kHz sine wave
Burst duration=1mS
Gap between bursts=2mS
Vpp = 5V
Voffset = 0V
In this example, we will use [[BG_Mode]](1) [[Direct Digital Synthesis|DDS Mode]] and [[BG_SyncMode]](4) SyncOut. [[BG_Mode]](1) will allow us to play the wavetable in a burst mode, and [[BG_SyncMode]](4) will allow us to ignore the trigger and TimePort. See [[Modes]] for more details.
{{{
//===============
// First initialize the BITLIB library
//===============
BL_Initialize(); // Initialize the library...
index=BL_OpenLink("USB:COM4"); // Open a BitScope link...
//===============
// Initialize the BITGEN library
//===============
BG_Init(); // Initialize the BitGen library...
BG_Open(); // Open the BitGen module...
//===============
// If everything is successful, a BitGen should exist at handle=0. This
// can be checked with BG_Count...
//===============
handle=0;
//===============
// Set the MODES
//===============
BG_Mode(handle,1); // Set BG_Mode Direct Digital Synthesis
BG_SyncMode(handle,4); // Set BG_SyncMode smSyncOut
//===============
// Load the WAVETABLE
//===============
LoadTable(handle,arr_of_sine_wave,1024);
//===============
// set the VOLTAGE parameters
//===============
BG_Amplitude(5); // Vpp = 5V
BG_Offset(0); // Voff = 0V
//===============
// set the TIMING parameters
//===============
BG_Freq(2000); // 2kHz
BG_Duration(1e-3); // 1mS burst
BG_BurstSpace(2e-3); // 2mS gap between
BG_Repeat(10); // repeat the burst 10 times...
//===============
// GENERATE the waveform
//===============
BG_Gen(handle);
//===============
// do stuff, wait for user to press return or capture from BitScope...
//===============
//===============
// close the BITGEN link
//===============
BG_Close(handle);
}}}
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This entry lists the BitGenLib function definitions.
Click on the function name to open the function definition in a new entry.
If you prefer, you can view the [[function definitions in C|C Function API]].
In Object Pascal (i.e. Delphi) the functions are defined as follows:
!!![[Initialization]]
procedure [[BG_Init]];
function [[BG_Open]] : Boolean;
!!![[Log|BG_Log]]
function [[BG_Log]] : PChar;
!!![[ID Functions]]
function [[BG_Count]] : Integer;
function [[BG_Scope]](AHandle : Integer) : Integer;
procedure [[BG_Name]](AHandle : Integer; AStr : PChar);
!!![[Modes]]
function [[BG_Mode]](AHandle : Integer; AMode : Integer) : Boolean;
function [[BG_SyncMode]](AHandle : Integer; AMode : Integer) : Boolean;
!!![[Voltage Setup]]
function [[BG_Voltage]](AHandle : Integer; AVoltage : Double) : Double;
function [[BG_Amplitude]](AHandle : Integer; AAmplitude : Double) : Double;
function [[BG_Offset]](AHandle : Integer; AOffset : Double) : Double;
function [[BG_Low]](AHandle : Integer; ALow : Double) : Double;
function [[BG_High]](AHandle : Integer; AHigh : Double) : Double;
!!![[WaveTable|Loading A WaveTable]]
function [[BG_LoadTable]](AHandle : Integer; AData : PSingle; ASize : Integer) : Boolean;
!!![[Trigger Setup]]
function [[BG_Trigger]](AHandle : Integer; AEdge : Boolean; ARise : Boolean) : Boolean;
function [[BG_HoldOff]](AHandle : Integer; ATime : Double) : Double;
function [[BG_Delay]](AHandle : Integer; ATime : Double) : Double;
!!![[Timing Setup]]
function [[BG_Freq]](AHandle : Integer; AFreq : Double) : Double;
function [[BG_Sweep]](AHandle : Integer; AStartFreq : Double; AEndFreq : Double) : Double;
function [[BG_Duration]](AHandle : Integer; ATime : Double) : Double;
function [[BG_BurstMark]](AHandle : Integer; ATime : Double) : Double;
function [[BG_BurstSpace]](AHandle : Integer; ATime : Double) : Double;
function [[BG_Repeat]](AHandle : Integer; ACount : Integer) : Integer;
!!![[Clock Setup]]
function [[BG_Tic]](AHandle : Integer; ATic : Integer) : Integer;
function [[BG_SampleRate]](AHandle : Integer; ARate : Double) : Double;
function [[BG_Factor]](AHandle : Integer; AFactor : Integer) : Integer;
function [[BG_Mark]](AHandle : Integer; ATics : Integer) : Integer;
function [[BG_Space]](AHandle : Integer; ATics : Integer) : Integer;
!!![[Generate]]
function [[BG_Gen]](AHandle : Integer) : Boolean;
procedure [[BG_Halt]](AHandle : Integer);
!!![[Close|BG_Close]]
function [[BG_Close]](AHandle : Integer) : Boolean;
The Pink Noise mode tells the BitGen to produce a random voltage at each sample rate clock tic. The range of these voltages are set with the functions [[BG_Amplitude]] and [[BG_Offset]]. The 8-bit digital to analog converter allows 256 different voltage steps. These steps are equal voltage increments with the lower bound
{{{
BG_Offset-BG_Amplitude/2
}}}
and the upper bound
{{{
BG_Offset+BG_Amplitude/2.
}}}
For more information on voltage levels, see [[Voltage Setup]].
In this mode [[BG_Freq]] is irrelevant, as is the wavetable. It is not necessary to use [[BG_LoadTable]] when using this mode.
Note that PinkNoise mode also allows waveform bursts. Bursts can be controlled with the [[Timing Setup]] parameters.
!!Available SyncModes
This table shows which BG_SyncModes are available with the Pink Noise mode.
|Mode\SyncMode|!TriggerIn|!ClockIn|!GateIn|!ClockOut|!SyncOut|h
|!PinkNoise|Yes|No|Yes|No|Yes|
!!Example
Let us assume we have a BS120U connected to a Linux machine at "USB:/dev/ttyUSB0".
Say we wanted to output bursts of pink noise between 0V and 5V, at a 1MHz sample rate. Let us also assume we have an external gate signal that we wished to use to trigger these bursts. For this, we would need to be in [[BG_Mode]](2) Pink Noise, and [[BG_SyncMode]](3) GateIn.
{{{
//==================
// Connect to the BitScope with BITLIB
//==================
BL_Initialize();
BL_OpenLink("USB:/dev/ttyUSB0");
//==================
// Connect to the BitGen with BitGenLib
//===================
BG_Init();
BG_Open();
//===========
// ...talking to BitScope at address 0
//============
handle=0;
//==================
// Set the mode...
//==================
BG_Mode(handle,3); // Pink noise mode...
BG_SyncMode(handle,2); // GateIn, gate signal on TimePort 0..5V
//====================
// Set the VOLTAGE
//====================
BG_Amplitude(handle,5.0); // 5V peak to peak...
BG_Offset(handle,2.5); // ...between 0..5
//==================
// Set the timing parameters...
//==================
BG_SampleRate(handle,1e6); // 1MHz sample rate
//=================
// Generate...
//=================
BG_Gen(handle);
//=================
// Waveform should now be present on POD pin 26.
// The waveform will appear whenever
// the TimePort is high, that is > 2.5V.
//=================
}}}
This file configures the BitScope Link Library to connect with BitScope devices via RS-232, USB or UDP IP networks. This file may be edited manually but this is not recommended unless you know what you are doing.
You can use the Probe File to connect to a BitScope with [[BitLib]].
The probe file specifies the links that a BitScope application will attempt to connect to. BitLib uses the probe file to manage links. If you do not know the correct probe file link for your BitScope, then you should run the [[BitScope Connection Manager]] application to locate the BitScope on your system. The BitScope Connection Manager is free and available for download from the <<tiddler ExternalURL with: bcm "" website>>.
!!Probe File Locations
The probe file is located in different places, depending on the operating system. There are normally 2 probe files on your system, a global and a local probe file. Only the local probe file should be modified in normal circumstances.
!!!On Windows
On Windows installations, the probe file is located in the following locations:
{{{
C:\Documents and Settings\<user>\Local Settings\Application Data\BitScope\BitScope.prb
}}}
where <user> is your user name on your windows installation.
The global probe file is located at
{{{
<INSTALLATION DIRECTORY>\BitScope.prb
}}}
where <INSTALLATION DIRECTORY> is the location chosen when you installed a BitScope application. The default is
{{{
C:\Program Files\BitScope\BitScope.prb
}}}
!!!On Linux
On linux systems copies of the probe file are created or installed in two places, the local probe file is
{{{
~/.bitscope/config/bitscope.prb
}}}
and the global probe file is located at
{{{
/etc/bitscope/bitscope.prb
}}}
Note that the local probe file is the probe file used by the BitLib function <<tiddler ExternalURL with: bitlib BL_Open BL_Open>>. If this file does not exist, you should use the [[Connection Manager|BitScope Connection Manager]] application to locate your BitScopes and correctly configure your system.
!!Probe File Syntax
Whitespace, blank lines or lines including '#' are ignored.
The remaining lines each define a single "link". Each link specifies a connection method and identifies a device.
The complete syntax of a LINK is:
LINK => SERIAL|NETWORK|NONE
SERIAL => UDP:ADDRESS(:PORT)?(:ID)?(:BC)?
NETWORK => (TTY|USB):DEVICE(:BC)?
NONE => NIL:BC(:PRODUCT)?(:VENDOR)?
TTY => serial connection method
USB => USB/Serial connection method
UDP => User Datagram Protcol (network) method
NIL => No connection method (simulate device)
DEVICE => serial or USB device (eg, /dev/ttyUSB0)
ADDRESS => IP address or host name or "MULTICAST"
PRODUCT => Device identifier (up to 8 alpha numeric)
VENDOR => Device vendor identifier (8 alpha-mueric)
PORT => IP port number (4 hex digits)
ID => BitScope LIA ID (4 hex digits)
BC => byte-code revision ID (eg, BC000301)
For example, to connect to a serial BitScope:
{{{
TTY:/dev/ttyS2
}}}
a USB BitScope:
{{{
USB:/dev/ttyUSB1
}}}
a serial BitScope, but only if it's a BS311
{{{
TTY:/dev/ttyS2:BS031100
}}}
a network BitScope via multicast
{{{
UDP:MULTICAST
}}}
or (if there are more than one BitScope on the local net) and you want to use port numbers to differentiate them
{{{
UDP:MULTICAST:4321
UDP:MULTICAST:4322
}}}
or using different IP addresses with unicast:
{{{
UDP:192.168.1.2
UDP:192.168.1.5
}}}
or if your BitScope has the hostname LABSCOPE
{{{
UDP:LABSCOPE
}}}
or to connect with our demo BS300N on the Internet
{{{
UDP:sydney.bitscope.net
}}}
!!Probe Defaults
These are reasonable defaults for a typical Windows host.
{{{
UDP:MULTICAST
USB:COM3
USB:COM4
USB:COM5
USB:COM6
USB:COM7
USB:COM8
USB:COM9
UDP:SYDNEY
TTY:COM1
TTY:COM2
NIL:BS032500
}}}
These are reasonable defaults for a typical Linux host.
{{{
USB:/dev/ttyUSB0
UDP:MULTICAST
USB:/dev/ttyUSB1
USB:/dev/ttyUSB2
UDP:SYDNEY
TTY:/dev/ttyS0
TTY:/dev/ttyS1
NIL:BS032500
}}}
Reference Mode allows you to output voltage levels.
The only relevant parameter functions in this mode are [[BG_Voltage]], [[BG_High]] and [[BG_Low]].
[[BG_Voltage]] will output a voltage on POD pin 26. The voltage requested will appear immediately on the output. You do not have to call [[BG_Gen]] in this mode.
[[BG_High]] will set the TimePort to logic high. You do not need to call [[BG_Gen]].
[[BG_Low]] will set the TimePort to logic low.
!!Example
Say we wish to output 5V.
{{{
//==================
// Connect to the BitScope with BITLIB
//==================
BL_Initialize();
BL_OpenLink("USB:/dev/ttyUSB0");
//==================
// Connect to the BitGen with BitGenLib
//===================
BG_Init();
BG_Open();
//===========
// ...talking to BitScope at address 0
//============
handle=0;
//==================
// Set the mode...
//==================
BG_Mode(handle,6); // DDS mode...
BG_SyncMode(handle,3); // ClockOut, output on TimePort required for logic
//====================
// Set the VOLTAGE
//====================
BG_Voltage(handle,5); // 5V now output on POD pin 26
}}}
There are several parameters that need to be setup in order for the BitGen to generate waveforms. These parameters control the voltage and timing of the generated waveform. These parameters must be called after the [[mode|Modes]] parameters.
After calling both [[BG_Mode]] and [[BG_SyncMode]], you can setup the BitGen by configuring the [[Voltage Setup]], [[Trigger Setup]] and [[Timing Setup]] parameters.
The [[Voltage Setup]] parameters allow you to control the amplitude and offset of your waveform, the rest voltage, and the logic high and low levels. Note that the parameters chosen must ensure that the full waveform lies inside the allowable voltage range [-5V...5V].
The [[Trigger Setup]] allows you to control the trigger event that appears on the TimePort. Note that you will need select the correct [[BG_SyncMode]] in order to use the trigger on the TimePort. To ignore the trigger, use [[BG_SyncMode]](4), SyncOut.
The [[Timing Setup]] parameters control the frequency, sample rate, and burst timing parameters. Some important timing parameters include [[BG_Freq]], [[BG_Duration]], [[BG_BurstSpace]] and [[BG_SampleRate]].
* The parameter [[BG_Freq]] selects the frequency at which to replay your wavetable. Note that this parameter is only relevant to [[BG_Modes|BG_Mode]] [[DDS Mode]] and [[VSR Mode]].
* [[BG_Duration]] controls the length of a waveform burst in seconds. Selecting a value of 0 will produce a continuous waveform.
* [[BG_BurstSpace]] controls the time in seconds between each [[BG_Duration]] burst.
* [[BG_SampleRate]] controls the sample rate of the BitGen. This is independent from the BitScope sample rate.
<<search>><<closeAll>><<permaview>><<newTiddler>><<slider chkSliderOptionsPanel OptionsPanel 'options »' 'Change TiddlyWiki advanced options'>>
BitGen Programmer's Library
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Once [[BG_Gen]] is called, the BitGen module will enter its timing cycle. The length of the timing cycle phases are dependent on the [[Timing Setup]] parameters.
The BitGen has 2 possible timing cycles, continuous and burst.
The first timing cycle is a continuous mode. A continuous waveform mode plays waveform continuously after the trigger period, and will not stop until [[BG_Halt]] is called. All [[BG_Modes|Modes]] have a continuous waveform mode. This continuous waveform is the only possible mode for [[VSR|VSR Mode]], [[WhiteNoise|WhiteNoise Mode]], Clock and Logic modes. The other modes, [[DDS Mode]] and [[PinkNoise Mode]], can output continuous waveform when [[BG_Duration]] is set to zero.
The continuous mode timing cycle is as follows:
{{{
1. Trigger
2. Delay
3. Generate
}}}
The second type of timing cycle is the burst mode. Only BG_Modes [[DDS Mode]] or [[PinkNoise Mode]] can use a burst mode. The burst mode timing cycle is as follows:
{{{
1. Trigger
2. Delay
3. BG_BurstMark
4. BG_Duration
5. BG_BurstSpace
6. Return to step 3 BG_Repeat times
7. End
}}}
Details of the phases are given below:
!!!Trigger
In the Trigger phase, the BitGen will wait for a trigger event on the external TimePort. The Trigger phase is only executed if the BitGen is in [[BG_SyncMode]](0) TriggerIn. The trigger can be configured with the [[BG_Trigger]] function. The trigger occurs only at the start of the timing cycle. To trigger on each burst of a waveform, you will need to use [[BG_SyncMode]](3) GateIn.
During the Trigger phase, the output voltage will be the rest voltage, which can be set with [[BG_Voltage]].
!!!Delay
The delay period comes immediately after the trigger period. The Delay phase will only be executed if you are in [[BG_SyncMode]](0) TriggerIn.
During the Delay phase, the output voltage will be the rest voltage, which is set with [[BG_Voltage]].
!!!Generate
The Generate phase plays the waveform as configured by the [[Timing Setup]] and [[Voltage Setup]] parameters.
!!!BG_BurstMark
The BG_BurstMark phase is a pre-burst delay, and is only relevant to the burst mode timing cycle. The length of the BG_BurstMark phase can be set with the function [[BG_BurstMark]]. This phase occurs before every [[BG_Duration]] phase.
If you are in [[BG_SyncMode]](4) SyncOut, then the TimePort will be asserted high during the BG_BurstMark phase. This implies that the falling edge of the TimePort coincides with the start of the waveform. If BG_BurstMark is set to zero, then the TimePort will be asserted high for one clock tic before the waveform burst commences.
During the BG_BurstMark phase, the voltage will be set to the level of the first sample to be played in the BG_Duration period. For example, if each burst plays a square wave between 3V and 0V, and the first sample in the wavetable is 3V, then the voltage level during the BG_BurstMark phase will be 3V. If you wish for BG_BurstMark to be at 0V, then you must set the first sample of the wavetable to be this level.
Note that the gap between each successive [[BG_Duration]] time is [[BG_BurstMark]] + [[BG_BurstSpace]].
!!!BG_Duration
The BG_Duration phase controls the length of time that the waveform is played during each burst. This phase will play the waveform at the frequency specified by [[BG_Freq]] if relevant. The voltage level during this phase, is controlled by [[BG_Amplitude]] and [[BG_Offset]].
If [[BG_Duration]] is set to 0 (continuous mode) then the continuous timing cycle is used, that is BG_BurstSpace, BG_BurstMark and BG_Duration are ignored. In continuous mode, the function [[BG_Halt]] is used to stop the waveform generation.
!!!BG_BurstSpace
The BG_BurstSpace phase is the post-burst delay used in the burst mode timing cycle. The BG_BurstSpace phase occurs after every BG_Duration phase. Note that the gap between bursts is BG_BurstMark + BG_BurstSpace. The duration of BG_BurstSpace is controlled by the function [[BG_BurstSpace]].
Note that if BG_Duration is set to 0 (continous mode), BG_BurstSpace will not be executed.
The voltage during this period will ramp down to the BG_BurstMark level. The voltage is guaranteed to reach the BG_BurstMark level before the BG_BurstMark period commences. The initial voltage level of the ramp is the last voltage level played during the BG_Duration phase.
!!!BG_Repeat
In a burst mode, the BG_BurstMark + BG_Duration + BG_BurstSpace phases will repeat [[BG_Repeat]] times. The function [[BG_Repeat]] sets this variable, with 0 requesting an infinite repeat. If the BitGen is in an infinite repeat mode, then the End phase will not be executed. To terminate an infinite repeat cycle, use [[BG_Halt]] or close the link.
!!!End
In the End phase, the voltage output level will shift to the level specified in the function [[BG_Voltage]].
The Timing Setup allows users to set all aspects of the BitGen related to timing. This includes frequency, burst times and the sample rate. If these functions are used, they must be called after [[BG_Mode]] and [[BG_SyncMode]].
The frequency of a waveform can be set with the function [[BG_Freq]]. Note that [[BG_Freq]] is only relevant in the [[Direct Digital Synthesis mode|DDS Mode]]. Other modes such as [[Variable Sample Rate|VSR Mode]], Noise and Clock modes do not use [[BG_Freq]]. To control the timing in these other modes, use [[BG_SampleRate]]. See [[Modes]] for more details on the different modes.
The internal sample rate is controlled with the function [[BG_SampleRate]]. The [[BG_SampleRate]] parameter is valid to all modes. Note that if this function is not called, then the fastest possible sample rate will be used. Note that if using BG_Mode(2) [[Clock Mode]], the [[Clock Setup]] parameters are used to control the timing.
For burst timing configuration, you can use the functions [[BG_Duration]], [[BG_BurstMark]], [[BG_BurstSpace]], and [[BG_Repeat]] to control the BitGen [[Timing Cycle]]. Note that burst waveforms are only available in BG_Mode(1) [[Direct Digital Synthesis|DDS Mode]] or BG_Mode(3) [[Pink Noise mode|PinkNoise Mode]]. [[BG_Duration]] controls the length of the waveform in burst modes. [[BG_BurstMark]] controls the delay time before each [[BG_Duration]] time period. [[BG_BurstSpace]] controls the delay time after each [[BG_Duration]]. Note that the gap between each burst will be [[BG_BurstMark]] + [[BG_BurstSpace]]. See [[Timing Cycle]] for further details.
To produce a continuous waveform, use [[BG_Duration]] with an argument of zero. An argument of 0 is required for a continuous mode when using BG_Mode [[DDS Mode]] or [[PinkNoise Mode]]. All other modes can only produce continuous waveforms, and ignore the BG_Duration value.
!!Example
Say if we wanted to send 3 bursts of a 5kHz sine wave, each burst being 1mS long with a 5mS gap between each burst. We can either have a pre-burst delay BG_BurstMark, or a post-burst delay BG_BurstSpace. Here we choose a 5mS BG_BurstSpace. Note that choosing BG_SampleRate in [[DDS mode|DDS Mode]] is not necessary. The fastest will be chosen for us.
{{{
//=======
// talking to BitGen at index 0...
//=======
handle=0;
//==================
// Set the mode...
//==================
BG_Mode(handle,1); // DDS mode allows bursts...
BG_SyncMode(handle,4); // SyncOut, TimePort high during BG_BurstMark
//==================
// Set the timing parameters...
//==================
BG_Freq(handle,5000); // 5kHz sine wave
BG_Duration(handle,1e-3); // 1mS duration
BG_BurstMark(handle,0); // no mark period
BG_BurstSpace(handle,5e-3); // 5mS delay between bursts
BG_Repeat(handle,3); // repeat 3 times...
//==============
// Do stuff, set voltages, trigger...
//===============
//===========
// Generate...
//===========
BG_Gen(handle);
}}}
On the other hand, if we simply wanted to play continuous pink noise at a sample rate of 1MHz, we would enter
{{{
//=======
// talking to BitGen at index 0...
//=======
handle=0;
//==================
// Set the mode...
//==================
BG_Mode(handle,3); // PinkNoise mode
BG_SyncMode(handle,4); // SyncOut, TimePort high before waveform
//==================
// Set the timing parameters...
//==================
BG_Duration(handle,0); // infinite duration
BG_SampleRate(1.0e6); // Sample rate in MHz
//==============
// Do stuff, set voltages, trigger...
//===============
//===========
// Generate...
//===========
BG_Gen(handle);
}}}
/%
!info
|Name|ToggleRightSidebar|
|Source|http://www.TiddlyTools.com/#ToggleRightSidebar|
|Version|2.0.0|
|Author|Eric Shulman|
|License|http://www.TiddlyTools.com/#LegalStatements|
|~CoreVersion|2.1|
|Type|transclusion|
|Description|show/hide right sidebar (SideBarOptions)|
Usage
<<<
{{{
<<tiddler ToggleRightSidebar>>
<<tiddler ToggleRightSidebar with: label tooltip>>
}}}
Try it: <<tiddler ToggleRightSidebar##show
with: {{config.options.chkShowRightSidebar?'►':'◄'}}>>
<<<
Configuration:
<<<
{{{
config.options.chkShowRightSidebar (true)
config.options.txtToggleRightSideBarLabelShow (◄)
config.options.txtToggleRightSideBarLabelHide (►)
}}}
<<<
!end
!show
<<tiddler {{
var co=config.options;
if (co.chkShowRightSidebar===undefined) co.chkShowRightSidebar=true;
var sb=document.getElementById('sidebar');
var da=document.getElementById('displayArea');
if (sb) {
sb.style.display=co.chkShowRightSidebar?'block':'none';
da.style.marginRight=co.chkShowRightSidebar?'':'1em';
}
'';}}>><html><nowiki><a href='javascript:;' title="$2"
onmouseover="
this.href='javascript:void(eval(decodeURIComponent(%22(function(){try{('
+encodeURIComponent(encodeURIComponent(this.onclick))
+')()}catch(e){alert(e.description?e.description:e.toString())}})()%22)))';"
onclick="
var co=config.options;
var opt='chkShowRightSidebar';
var show=co[opt]=!co[opt];
var sb=document.getElementById('sidebar');
var da=document.getElementById('displayArea');
if (sb) {
sb.style.display=show?'block':'none';
da.style.marginRight=show?'':'1em';
}
saveOptionCookie(opt);
var labelShow=co.txtToggleRightSideBarLabelShow||'◄';
var labelHide=co.txtToggleRightSideBarLabelHide||'►';
if (this.innerHTML==labelShow||this.innerHTML==labelHide)
this.innerHTML=show?labelHide:labelShow;
this.title=(show?'hide':'show')+' right sidebar';
var sm=document.getElementById('storyMenu');
if (sm) config.refreshers.content(sm);
return false;
">$1</a></html>
!end
%/<<tiddler {{
var src='ToggleRightSidebar';
src+(tiddler&&tiddler.title==src?'##info':'##show');
}} with: {{
var co=config.options;
var labelShow=co.txtToggleRightSideBarLabelShow||'◄';
var labelHide=co.txtToggleRightSideBarLabelHide||'►';
'$1'!='$'+'1'?'$1':(co.chkShowRightSidebar?labelHide:labelShow);
}} {{
var tip=(config.options.chkShowRightSidebar?'hide':'show')+' right sidebar';
'$2'!='$'+'2'?'$2':tip;
}}>>
To enable the trigger, you must be in [[BG_SyncMode]](0) TriggerIn. The function [[BG_Trigger]] controls the trigger parameters.
The trigger mode is not available in all [[BG_Modes|BG_Mode]]. The modes that have a trigger setting are [[VSR Mode]], [[DDS Mode]], [[PinkNoise Mode]] and [[WhiteNoise Mode]].
The trigger signal should be placed on the TimePort, located on the front panel of BS120U/BS100U. All trigger signals are considered to be between 0V to 5V.
The trigger parameters are controlled with the function [[BG_Trigger]]. BG_Trigger has two boolean arguments AEdge and ARise.
If AEdge is true, then the trigger event will occur when an edge is seen on the TimePort. A rising edge is considered to be a voltage level moving from below 2.5V to above 2.5V. A falling edge is considered to be a voltage level moving from above 2.5V to below 2.5V.
If AEdge is false, then the trigger event will occur when the TimePort is seen high, that is greater than 2.5V.
ARise is only relevant if AEdge is true. If ARise is true, then the trigger event will occur on a rising edge. If ARise is false then the trigger event will occur on a falling edge.
Shown here are some frequently encountered problems when using BitGenLib. We appreciate any comments or suggestions you have to improve the software. Please send feedback to project@bitscope.com.
!!What is BitGen
[[BitGen]] is a waveform generator module that is part of BS120U or which can be installed as an option for BS100U. That is, you need a BS120U or a BitGen module installed in your BS100U in order to use [[BitGenLib]]. If you do not have a BitGen, you can order one from [[here|http://www.bitscope.com/product/DWG100/]]. See [[BitGen]] for more information on the module.
!!I can't find my BitScope with BitLib
Firstly, you will need the link string for your BitScope. The link string is a [[Probe File]] entry that defines a BitScope communication link. Please use the [[BitScope Connection Manager]] to locate and test the BitScopes connected to your system. The Connection Manager will also configure your probe file. Once you have a link name, say UDP:192.168.1.75, then you will need to use it to set up BitLib calls <<tiddler ExternalURL with: bitlib BL_Open BL_Open>> and <<tiddler ExternalURL with: bitlib BL_OpenLink BL_OpenLink>>. If the Connection Manager can locate a BitScope, then BitLib should find it as well. If the Connection Manager cannot find your BitScope, please consult the Connection Manager help files for assistance in detecting your BitScope.
!!I can't find my BS100U/BitGen with BitGenLib
First make sure you have a BS120U or that the BitGen module is installed in your BS100U. To check, undo the cover of your BS100U and look to see that a chip labeled 'DWG-100-01' is on the board. If there is no BitGen installed you will not be able to use the BitGenLib library.
If you do have a BitGen, first verify that the DSO can find the BitGen. To do this, connect the DSO to the BS100U. Select DWG and pick a triangle wave of about 2V peak to peak. This waveform should appear on ChB. If not, the module may be installed incorrectly. Consult the BitGen manual to see how to install the BitGen module correctly.
If you are sure that the BitGen module is installed correctly, then the next step is to connect to the BitScope with [[BitLib]]. Please see the entry [[Connecting To A BitScope]] for information on using [[BitLib]] to connect to your scope. You can check whether you are connected to the BitScope with the function <<tiddler ExternalURL with: bitlib BL_Name BL_Name>> this function should return the link name of the BS100U.
Once you are sure you are connected with BitLib, then you can use the functions [[BG_Init]] and [[BG_Open]] to connect, as described in the [[Connecting To BitGen]] entry.
!!Bugs
Please report any bugs you find to project@bitscope.com. In your message, please indicate the operating system you are using.
!!I have some other problem
If you have a software related problem with BitGenLib or BitLib please contact project@bitscope.com. If you have a hardware or BitScope related problem, please contact support@bitscope.com.
The Variable Sample Rate mode generates continuous waveforms from the wavetable. This mode allows the user to set the length of the [[wavetable|Loading A WaveTable]] to any value from 2 to 1024. As the BitGen plays the waveform, the step size used when moving through the wavetable is 1. This means that the waveforms played in this mode will have no waveform jitter.
To calculate frequency in this mode, you should use the wavetable size in [[BG_LoadTable]] and [[BG_SampleRate]] according to the formula
{{{
freq = sample rate / wavetable size
}}}
For example, to play a 1kHz sine wave, say you load a [[wavetable|Loading A WaveTable]] of 100 samples, you would need select a sample rate of 100kHz. [[BG_Freq]] can not be used to set the frequency in this mode, it can only be used to query the final frequency.
Bursts are not available in this mode. With continuous waveforms however, this mode can generate the fastest frequencies e.g. ~ 2.5MHz for a 2 sample square wave.
NOTE: This mode should only ever be used for higher frequencies or precise sample rates. In all other cases, [[BG_Mode]](1) [[DDS Mode]] should be used. The VSR mode is a subset of the [[DDS Mode]].
!!Available SyncModes
This table shows which [[BG_SyncModes|BG_SyncMode]] are available with the VSR mode.
|Mode\SyncMode|!TriggerIn|!ClockIn|!GateIn|!ClockOut|!SyncOut|h
|!VSR|Yes|Yes|No|Yes|Yes|
!!Example
Let us assume we have a BS100U at USB:COM3.
Say we wish to replay a wavetable of a 128 point sine wave at a frequency of 100kHz. Let us say we wish for the waveform voltage to be between -2V and 2V. To generate this waveform at 200kHz, we must calculate the sample rate to set:
{{{
sample rate = freq * wavetable size
}}}
which in this case is 1.28MHz.
For this waveform, we will also need a wavetable of 128 points, with values ranging from 0..255 e.g.
{{{
//==============
// Fill wavetable...
//==============
const int WT_SIZE = 128;
float arr[WT_SIZE];
for(i=0;i<WT_SIZE;i++){
arr[i] = sin(2.0*M_PI*i/WT_SIZE);
}
}}}
Putting it all together, our BitGenLib setup would look something like:
{{{
//==================
// Connect to the BitScope with BITLIB
//==================
BL_Initialize();
BL_OpenLink("USB:/dev/ttyUSB0");
//==================
// Connect to the BitGen with BitGenLib
//===================
BG_Init();
BG_Open();
//===========
// ...talking to BitScope at address 0
//============
handle=0;
//==================
// Set the mode...
//==================
BG_Mode(handle,0); // VSR mode...
BG_SyncMode(handle,4); // SyncOut, ignore trigger and TimePort
//==================
// Load the WAVETABLE
//==================
BG_LoadTable(handle,arr,128); // arr is our 128 point sine wave table
//====================
// Set the VOLTAGE
//====================
BG_Amplitude(handle,4); // 4V peak to peak...
BG_Offset(handle,0); // ...between -2V..2V
//==================
// Set the timing parameters...
//==================
BG_SampleRate(handle,1.28e6); // 1.28MHz sample rate
//==================
// Check what frequency we will really produce
//==================
freq=BG_Freq(handle,0.0);
printf("We will output frequency %f. \n",freq);
//=================
// Generate...
//=================
BG_Gen(handle);
//=================
// Waveform should now be present on POD pin 26.
// You can stop the waveform with BG_Halt.
//=================
}}}
<!--{{{-->
<div class='toolbar' macro='toolbar [[ToolbarCommands::ViewToolbar]]'></div>
<div class='title' macro='view title'></div>
<div class='tagging' macro='tagging'></div>
<div class='tagged' macro='tags'></div>
<div class='viewer' macro='view text wikified'></div>
<div class='tagClear'></div>
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To control the voltage levels in BitGenLib, you can use the functions [[BG_Amplitude]], [[BG_Offset]] and [[BG_Voltage]]. The values returned from these functions are the true values that were set inside the virtual machine.
Given these voltage settings, you must ensure that the waveform is between -5V and 5V. Any sample outside this range will clip. The library will prevent selections that move the waveform outside this range. The library will return a value that will keep the voltages within the valid range. Note that this voltage returned may still change as other parameters are set. For example, BG_Amplitude(10.0) is legal, and 10 will be returned. However, calling BG_Offset(3) after this will cause the waveform to clip, so the amplitude and offset may be reduced inside the library.
[[BG_Voltage]] controls the rest voltage output from BitGen. This rest voltage occurs at the End phase of the [[Timing Cycle]]. [[BG_Voltage]] does not set the voltage between bursts. This voltage output between bursts is the voltage level of the first sample of the wavetable.
[[BG_Offset]] controls the DC offset of the output waveform.
[[BG_Amplitude]] controls the peak to peak voltage of the waveform.
Note that when playing from the wavetable, the value -1.0 in the wavetable corresponds to BG_Offset - BG_Amplitude/2, and the value 1.0 corresponds to BG_Offset + BG_Amplitude/2.
!!Example
To generate a 5V peak to peak waveform with 1V offset, then settling at the rest voltage -1V, you would call the functions
{{{
//===============
// Talking to BitGen at index 0...
//===============
handle=0
//=============
// Set modes...
//=============
//=============
// Set voltages...
//=============
V_pp=BG_Amplitude(handle,5.0);
printf("Requested 5.0 and received %f\n",V_pp);
V_off=BG_Offset(handle,1.0);
printf("Requested 1.0 and received %f\n",V_off);
V_rest=BG_Voltage(handle,-1.0);
printf("Requested -1.0 and received %f\n",V_rest);
}}}
The White Noise mode tells the [[BitGen]] to produce a random voltage at each sample rate clock tic. The WhiteNoise mode will randomly play only 2 voltages, high or low. The range of these voltages are set with the functions [[BG_Amplitude]] and [[BG_Offset]]. The levels can be calculated as
{{{
BG_Offset ± BG_Amplitude/2
}}}
In this mode [[BG_Freq]] is irrelevant, as is the wavetable. It is not necessary to use [[BG_LoadTable]] when using this mode.
!!Available SyncModes
This table shows which BG_SyncModes are available with the White Noise mode.
|Mode\SyncMode|!TriggerIn|!ClockIn|!GateIn|!ClockOut|!SyncOut|h
|!WhiteNoise|Yes|Yes|No|Yes|Yes|
!!Example
Let us assume we have a BS120U at USB:COM4.
To set up an output waveform to trigger on a rising edge, and output white noise between 0V and 1V, and replay at a sample rate of 2MHz. We would use the following setup:
{{{
//==================
// Connect to the BitScope with BITLIB
//==================
BL_Initialize();
BL_OpenLink("USB:COM4");
//==================
// Connect to the BitGen with BitGenLib
//===================
BG_Init();
BG_Open();
//===========
// ...talking to BitScope at address 0
//============
handle=0;
//==================
// Set the mode...
//==================
BG_Mode(handle,4); // White noise mode...
BG_SyncMode(handle,0); // TriggerIn, trigger signal on TimePort
//====================
// Set the VOLTAGE
//====================
BG_Amplitude(handle,1.0); // 1V peak to peak...
BG_Offset(handle,0.5); // ...between 0..1
//====================
// Set the TRIGGER
//====================
BG_Trigger(handle,true,true); // trigger on a rising edge
//==================
// Set the timing parameters...
//==================
BG_SampleRate(handle,2.0e6); // 2MHz sample rate
//=================
// Generate...
//=================
BG_Gen(handle);
//=================
// Waveform should now be present on POD pin 26.
// It is now possible to capture the
// waveform from ChB using BitLib.
//=================
}}}